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7 result(s) for "Ametova, Elnara"
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Framework development for software functionality in Uzbekistan’s block route centralization system
The article notes the relevance of the use of the latest scientific and technical developments, in transportation management justified by the need to increase the intensity of train traffic and ever-increasing freight turnover while maintaining the safety of train traffic. The solution of actual innovative tasks on the application of electronic devices in railway automation and telemechanics devices will allow to increase the level of transportation safety. Digital information processing and frame modeling techniques were used to achieve this goal. The method of microelectronic implementation of blocks of the set group of the route relay centralization system functional purpose is considered. To formalize the description of blocks of the set group, the method of role frames has been developed, which allows to obtaining of unified information and mathematical support for microprocessor blocks of the set group that control the switching of points, the operation of shunting, and trainset signals. The software purpose of the coupled point control unit is to constantly survey the slot descriptions to determine a positive or negative response. Change of state〖g〗_“PU1,” g_“MU1” indicates the beginning of the procedure for setting a route passing through this point. Changes in the state of the variable g_“NKN,” g_“KN” control units of shunting and trainset signals determine the directions of the software when setting routes. The use of role frame models allowed to optimize the software structure of microcontrollers used to replace the relay contact hardware of the route relay centralization system.
Theoretical prerequisites in the organization of the construction of diagnostic systems, microprocessor blocks of a typesetting group of railway automation and telemechanics
The article presents the results of theoretical research in the organization of the construction of a diagnostic system, microprocessor blocks of a typesetting group of railway automation and telemechanics. Products made with the use of microcontrollers, using mathematical expressions to determine the criteria for evaluating the diagnostic process, were subject to research. A graph of the theory of Petri nets of transitions of the diagnostic system of blocks of a set group has been developed and analyzed to determine the readiness indicator.
The operation model of the point setting relay for a microelectronic device
The application of electromagnetic relays in train control systems in rail transport is a challenging task. The solution of this innovative problem is based on the use of microelectronic, contactless elements, graph theory, process modeling, and the use of microprocessors. A Petri net multigraph has been developed and investigated for various operating modes of route cutting relays. Multigraphs, the functional diagram, and the algorithm of operation of the microelectronic relay block are given.
Development, research of a model and an algorithm for organizing data transfer in a monitoring device
The article examines the use of the graph theory method, in particular, the Petri net graph, for the development of microprocessor devices for remote continuous monitoring of the state of railway automation control equipment using Internet of Things technologies. Based on it, the model of the behavior of a set of modules that determines the state of automatic blocking signal point devices was studied.
A Method for Synthesizing Self-Checking Discrete Systems with Calculations Testing Based on Parity and Self-Duality of Calculated Functions
Calculations testing can be effectively used in the construction of discrete self-checking devices. Calculations testing is based on the parity and self-duality of the calculated functions. This can be used for modern blocks and nodes of control systems for responsible technological processes. However, its use has a number of features that must be considered when building concurrent error-detection circuits. The authors used methods of discrete mathematics and Boolean algebra as well as technical diagnostics of discrete systems to investigate the problem of ensuring the testability of the parity encoder. Theorems on the testability of convolution functions modulo 2 are proved. Considering these theorems allowed the authors of the article to propose a method for synthesizing CED circuits. This method increases the testability of the encoder for parity. This method is based on the use of two diagnostic signs at once. The first sign is that the code words belong to the parity code. The second is the self-dual control function in the concurrent error-detection circuit. This method is guaranteed to increase the testability of the parity coder compared to using one of the diagnostic signs for calculations testing. Experiments with testing discrete devices have shown the effectiveness of the organization structure of the concurrent error-detection circuit that we developed. The theorems that we proved form the basis of proof of similar provisions for the use of other linear codes in the synthesis of concurrent error-detection circuits. Our proposed solutions with calculations testing based on two diagnostic signs should be used in the synthesis of discrete systems. Discrete systems should be self-checking and have improved testability indicators.
Combinational Circuits Testing Based on Hsiao Codes with Self-Dual Check Functions
This paper investigates the features of using modified Hamming codes, which are also known as Hsiao codes. Self-checking digital devices are proposed to be implemented with calculations testing using two diagnostic signs. These signs indicate that the functions (there are functions that describe check bits) belong to the class of self-dual Boolean functions and also belong to the codewords of Hsiao codes (these are codes with an odd column of weights). The authors have established that all check functions can be self-dual for a certain number of the Hsiao codes’ data symbols. Such codes can be used in the synthesis of concurrent error-detection circuits by two diagnostic signs. The paper describes the structure of an organization for a concurrent error-detection circuit based on Hsiao codes with self-dual check functions. Some experimental results are presented on the synthesis of self-checking devices using the proposed methodology. The controllability of the structure and the number of test combinations both increased. Hsiao codes can be effectively used with self-dual check functions in the synthesis of self-checking digital devices.
Features of Construction of Systems of Railway Automatics and Telemechanics at the Organization of High-Speed Traffic in the Republic of Uzbekistan
The most effective way to intensify the work of railway transport, improve the use of its main complex and costly technical means of transportation process management automation is using complex systems of interval control of train traffic and ensure its security. In the Republic of Uzbekistan decided to modernize its railways, where the priority is to increase the speed of passenger trains. A number of activities were undertaken to ensure the safety of high-speed trains such as the strengthening of railway tracks, update the dimensions of buildings, changing the configuration of the switches. In some areas, replaced antiquated systems of interval train traffic management with focus on devices automatic locomotive signaling.