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Quantum behaviour in electrical circuits Bell inequalities provide a quantitative measure that can distinguish classically determined correlations from stronger quantum correlations. Experiments on microscopic systems such as atoms and photons strongly favour the quantum description, but there has been no Bell test in a solid-state system. This paper reports clear evidence for violation of a Bell inequality (and thus quantum behaviour) in a macroscopic electrical circuit consisting of superconducting phase qubits. Bell inequalities are a quantitative measure that can distinguish classically determined correlations from stronger quantum correlations, and their measurement provides strong experimental evidence that quantum mechanics provides a complete description. The violation of a Bell inequality is now demonstrated in a solid-state system; the experiment provides further strong evidence that a macroscopic electrical circuit is really a quantum system. The measurement process plays an awkward role in quantum mechanics, because measurement forces a system to ‘choose’ between possible outcomes in a fundamentally unpredictable manner. Therefore, hidden classical processes have been considered as possibly predetermining measurement outcomes while preserving their statistical distributions 1 . However, a quantitative measure that can distinguish classically determined correlations from stronger quantum correlations exists in the form of the Bell inequalities, measurements of which provide strong experimental evidence that quantum mechanics provides a complete description 2 , 3 , 4 . Here we demonstrate the violation of a Bell inequality in a solid-state system. We use a pair of Josephson phase qubits 5 , 6 , 7 acting as spin-1/2 particles, and show that the qubits can be entangled 8 , 9 and measured so as to violate the Clauser–Horne–Shimony–Holt (CHSH) version of the Bell inequality 10 . We measure a Bell signal of 2.0732 ± 0.0003, exceeding the maximum amplitude of 2 for a classical system by 244 standard deviations. In the experiment, we deterministically generate the entangled state, and measure both qubits in a single-shot manner, closing the detection loophole 11 . Because the Bell inequality was designed to test for non-classical behaviour without assuming the applicability of quantum mechanics to the system in question, this experiment provides further strong evidence that a macroscopic electrical circuit is really a quantum system 7 .

Practical quantum computing will require error rates well below those achievable with physical qubits. Quantum error correction 1 , 2 offers a path to algorithmically relevant error rates by encoding logical qubits within many physical qubits, for which increasing the number of physical qubits enhances protection against physical errors. However, introducing more qubits also increases the number of error sources, so the density of errors must be sufficiently low for logical performance to improve with increasing code size. Here we report the measurement of logical qubit performance scaling across several code sizes, and demonstrate that our system of superconducting qubits has sufficient performance to overcome the additional errors from increasing qubit number. We find that our distance-5 surface code logical qubit modestly outperforms an ensemble of distance-3 logical qubits on average, in terms of both logical error probability over 25 cycles and logical error per cycle ((2.914 ± 0.016)% compared to (3.028 ± 0.023)%). To investigate damaging, low-probability error sources, we run a distance-25 repetition code and observe a 1.7 × 10 −6 logical error per cycle floor set by a single high-energy event (1.6 × 10 −7 excluding this event). We accurately model our experiment, extracting error budgets that highlight the biggest challenges for future systems. These results mark an experimental demonstration in which quantum error correction begins to improve performance with increasing qubit number, illuminating the path to reaching the logical error rates required for computation. A study demonstrating increasing error suppression with larger surface code logical qubits, implemented on a superconducting quantum processor.

The leakage of quantum information out of the two computational states of a qubit into other energy states represents a major challenge for quantum error correction. During the operation of an error-corrected algorithm, leakage builds over time and spreads through multi-qubit interactions. This leads to correlated errors that degrade the exponential suppression of the logical error with scale, thus challenging the feasibility of quantum error correction as a path towards fault-tolerant quantum computation. Here, we demonstrate a distance-3 surface code and distance-21 bit-flip code on a quantum processor for which leakage is removed from all qubits in each cycle. This shortens the lifetime of leakage and curtails its ability to spread and induce correlated errors. We report a tenfold reduction in the steady-state leakage population of the data qubits encoding the logical state and an average leakage population of less than 1 × 10−3 throughout the entire device. Our leakage removal process efficiently returns the system back to the computational basis. Adding it to a code circuit would prevent leakage from inducing correlated error across cycles. With this demonstration that leakage can be contained, we have resolved a key challenge for practical quantum error correction at scale.Physical realizations of qubits are often vulnerable to leakage errors, where the system ends up outside the basis used to store quantum information. A leakage removal protocol can suppress the impact of leakage on quantum error-correcting codes.

In quantum information processing, qudits (d-level systems) are an extension of qubits that could speed up certain computing tasks. We demonstrate the operation of a superconducting phase qudit with a number of levels d up to d = 5 and show how to manipulate and measure the qudit state, including simultaneous control of multiple transitions. We used the qudit to emulate the dynamics of single spins with principal quantum number s = 1/2, 1, and 3/2, allowing a measurement of Berry's phase and the even parity of integer spins (and odd parity of half-integer spins) under 2π-rotation. This extension of the two-level qubit to a multilevel qudit holds promise for more-complex quantum computational architectures and for richer simulations of quantum mechanical systems.

The concepts of entanglement and superpositions introduced by quantum mechanics promise to allow for the design of a new computing architecture, called a quantum computer, that can exponentially outperform any possible classical computer. Such a performance improvement would make presently intractable computational problems efficiently solvable. Such problems include optimizations, like the traveling salesman problem, factorization, and quantum simulations, e.g. for medical research. This thesis discusses one approach to implementing a quantum computer that is based on Superconducting Josephson Phase Qubits. An experiment is presented that shows a violation of Bell's inequality using these qubits (quantum bits), i.e. it demonstrates that a pair of these qubits can be placed into a state that shows a stronger correlation than possible for a classical pair of bits. This experiment meets a major mile-stone for the field of superconducting qubits as it provides strong evidence that the architecture will indeed be able to outperform classical systems. Furthermore, this experiment is the first demonstration of a violation of Bell's inequality in a solid state system, and the first demonstration in a macroscopic quantum system. It therefore adds valuable supporting evidence that the new ideas proposed by quantum mechanics are indeed valid across different quantum systems and cannot be explained by a deterministic alternative theory.

Understanding universal aspects of quantum dynamics is an unresolved problem in statistical mechanics. In particular, the spin dynamics of the 1D Heisenberg model were conjectured to belong to the Kardar-Parisi-Zhang (KPZ) universality class based on the scaling of the infinite-temperature spin-spin correlation function. In a chain of 46 superconducting qubits, we study the probability distribution, \\(P(\\mathcal{M})\\), of the magnetization transferred across the chain's center. The first two moments of \\(P(\\mathcal{M})\\) show superdiffusive behavior, a hallmark of KPZ universality. However, the third and fourth moments rule out the KPZ conjecture and allow for evaluating other theories. Our results highlight the importance of studying higher moments in determining dynamic universality classes and provide key insights into universal behavior in quantum systems.

We demonstrate a high dynamic range Josephson parametric amplifier (JPA) in which the active nonlinear element is implemented using an array of rf-SQUIDs. The device is matched to the 50 \\(\\Omega\\) environment with a Klopfenstein-taper impedance transformer and achieves a bandwidth of 250-300 MHz, with input saturation powers up to -95 dBm at 20 dB gain. A 54-qubit Sycamore processor was used to benchmark these devices, providing a calibration for readout power, an estimate of amplifier added noise, and a platform for comparison against standard impedance matched parametric amplifiers with a single dc-SQUID. We find that the high power rf-SQUID array design has no adverse effect on system noise, readout fidelity, or qubit dephasing, and we estimate an upper bound on amplifier added noise at 1.6 times the quantum limit. Lastly, amplifiers with this design show no degradation in readout fidelity due to gain compression, which can occur in multi-tone multiplexed readout with traditional JPAs.

Leakage of quantum information out of computational states into higher energy states represents a major challenge in the pursuit of quantum error correction (QEC). In a QEC circuit, leakage builds over time and spreads through multi-qubit interactions. This leads to correlated errors that degrade the exponential suppression of logical error with scale, challenging the feasibility of QEC as a path towards fault-tolerant quantum computation. Here, we demonstrate the execution of a distance-3 surface code and distance-21 bit-flip code on a Sycamore quantum processor where leakage is removed from all qubits in each cycle. This shortens the lifetime of leakage and curtails its ability to spread and induce correlated errors. We report a ten-fold reduction in steady-state leakage population on the data qubits encoding the logical state and an average leakage population of less than \\(1 \\times 10^{-3}\\) throughout the entire device. The leakage removal process itself efficiently returns leakage population back to the computational basis, and adding it to a code circuit prevents leakage from inducing correlated error across cycles, restoring a fundamental assumption of QEC. With this demonstration that leakage can be contained, we resolve a key challenge for practical QEC at scale.

Quantum error correction is essential for bridging the gap between the error rates of physical devices and the extremely low logical error rates required for quantum algorithms. Recent error-correction demonstrations on superconducting processors have focused primarily on the surface code, which offers a high error threshold but poses limitations for logical operations. In contrast, the color code enables much more efficient logic, although it requires more complex stabilizer measurements and decoding techniques. Measuring these stabilizers in planar architectures such as superconducting qubits is challenging, and so far, realizations of color codes have not addressed performance scaling with code size on any platform. Here, we present a comprehensive demonstration of the color code on a superconducting processor, achieving logical error suppression and performing logical operations. Scaling the code distance from three to five suppresses logical errors by a factor of \\(\\Lambda_{3/5}\\) = 1.56(4). Simulations indicate this performance is below the threshold of the color code, and furthermore that the color code may be more efficient than the surface code with modest device improvements. Using logical randomized benchmarking, we find that transversal Clifford gates add an error of only 0.0027(3), which is substantially less than the error of an idling error correction cycle. We inject magic states, a key resource for universal computation, achieving fidelities exceeding 99% with post-selection (retaining about 75% of the data). Finally, we successfully teleport logical states between distance-three color codes using lattice surgery, with teleported state fidelities between 86.5(1)% and 90.7(1)%. This work establishes the color code as a compelling research direction to realize fault-tolerant quantum computation on superconducting processors in the near future.

A remarkable characteristic of quantum computing is the potential for reliable computation despite faulty qubits. This can be achieved through quantum error correction, which is typically implemented by repeatedly applying static syndrome checks, permitting correction of logical information. Recently, the development of time-dynamic approaches to error correction has uncovered new codes and new code implementations. In this work, we experimentally demonstrate three time-dynamic implementations of the surface code, each offering a unique solution to hardware design challenges and introducing flexibility in surface code realization. First, we embed the surface code on a hexagonal lattice, reducing the necessary couplings per qubit from four to three. Second, we walk a surface code, swapping the role of data and measure qubits each round, achieving error correction with built-in removal of accumulated non-computational errors. Finally, we realize the surface code using iSWAP gates instead of the traditional CNOT, extending the set of viable gates for error correction without additional overhead. We measure the error suppression factor when scaling from distance-3 to distance-5 codes of \\(\\Lambda_{35,\\text{hex}} = 2.15(2)\\), \\(\\Lambda_{35,\\text{walk}} = 1.69(6)\\), and \\(\\Lambda_{35,\\text{iSWAP}} = 1.56(2)\\), achieving state-of-the-art error suppression for each. With detailed error budgeting, we explore their performance trade-offs and implications for hardware design. This work demonstrates that dynamic circuit approaches satisfy the demands for fault-tolerance and opens new alternative avenues for scalable hardware design.