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Self-driven photodetectors that can detect light without any external voltage bias are important for low-power applications, including future internet of things, wearable electronics, and flexible electronics. While two-dimensional (2D) materials exhibit good optoelectronic properties, the extraordinary properties have not been fully exploited to realize high-performance self-driven photodetectors. In this paper, a metal–semiconductor–metal (MSM) photodetector with graphene and Au as the two contacts have been proposed to realize the self-driven photodetector. Van der Waals contacts are formed by dry-transfer methods, which is important in constructing the asymmetrical MSM photodetector to avoid the Fermi-level pinning effect. By choosing graphene and Au as the two contact electrodes, a pronounced photovoltaic effect is obtained. Without any external bias, the self-driven photodetector exhibits a high responsivity of 7.55 A W −1 and an ultrahigh photocurrent-to-dark current ratio of ~10 8 . The photodetector also shows gate-tunable characteristics due to the field-induced Fermi-level shift in the constituent 2D materials. What is more, the high linearity of the photodetector over almost 60 dB suggests the easy integration with processing circuits for practical applications.

A methodology to develop artificial neural network (ANN) models to quickly incorporate the characteristics of emerging devices for circuit simulation is described in this work. To improve the model accuracy, a current and voltage data preprocessing scheme is proposed to derive a minimum dataset to train the ANN model with sufficient accuracy. To select a proper network size, four guidelines are developed from the principles of two-layer network. With that, a reference ANN size is proposed as a generic three-terminal transistor model. The ANN model formulated using the proposed approach has been verified by physical device data. Both the device and circuit-level tests show that the ANN model can reproduce and predict various device and circuits with high accuracy.

Synthesis of the vertically aligned carbon nanotubes (CNTs) using complementary metal-oxide-semiconductor (CMOS)-compatible methods is essential to integrate the CNT contact and interconnect to nanoscale devices and ultra-dense integrated nanoelectronics. However, the synthesis of high-density CNT array at low-temperature remains a challenging task. The advances in the low-temperature synthesis of high-density vertical CNT structures using CMOS-compatible methods are reviewed. Primarily, recent works on theoretical simulations and experimental characterizations of CNT growth emphasized the critical roles of catalyst design in reducing synthesis temperature and increasing CNT density. In particular, the approach of using multilayer catalyst film to generate the alloyed catalyst nanoparticle was found competent to improve the active catalyst nanoparticle formation and reduce the CNT growth temperature. With the multilayer catalyst, CNT arrays were directly grown on metals, oxides, and 2D materials. Moreover, the relations among the catalyst film thickness, CNT diameter, and wall number were surveyed, which provided potential strategies to control the tube density and the wall density of synthesized CNT array.

A method to synthesize high-density, vertically-aligned, multi-wall carbon nanotubes (MWCNTs) on an insulating substrate at low temperature using a complementary metal–oxide–semiconductor (CMOS) compatible process is presented. Two factors are identified to be important in the carbon nanotube (CNT) growth, which are the catalyst design and the substrate material. By using a Ni–Al–Ni multilayer catalyst film and a ZrO2 substrate, vertically-aligned CNTs can be synthesized at 340 °C using plasma-enhanced chemical vapor deposition (PECVD). Both the quality and density of the CNTs can be enhanced by increasing the synthesis temperature. The function of the aluminum interlayer in reducing the activation energy of the CNT formation is studied. The nanoparticle sintering and quick accumulation of amorphous carbon covering the catalyst can prematurely stop CNT synthesis. Both effects can be suppressed by using a substrate with a high surface energy such as ZrO2.

A digital calibration method is presented to reduce SAR ADC offset mismatch. By reusing charge injection (CI) cells, the offset in the sense amplifier (SA) is reduced to less than 1 LSB. In addition, four auxiliary CI cells are incorporated in the digital‐to‐analogue converter to further reduce the SA offset below 1/2 LSB. Measurement results from a 180 nm CMOS test chip validate the effectiveness of the proposed method. The offset is reduced to 0.5 mV measured at a common‐mode voltage of 1.5 V with a 1.8 V power supply. A digital calibration method is presented to reduce SAR ADC offset mismatch. By reusing charge injection (CI) cells, the offset in the sense amplifier (SA) is reduced to less than 1 LSB. In addition, four auxiliary CI cells are incorporated in the digital‐to‐analog converter to further reduce the SA offset below 1/2 LSB. Measurement results from a 180 nm CMOS test chip validate the effectiveness of the proposed method. The offset is reduced to 0.5 mV measured at a common‐mode voltage of 1.5 V with a 1.8 V power supply.

Neuromorphic event-based image sensors capture only the dynamic motion in a scene, which is then transferred to computation units for motion recognition. This approach, however, leads to time latency and can be power consuming. Here we report computational event-driven vision sensors that capture and directly convert dynamic motion into programmable, sparse and informative spiking signals. The sensors can be used to form a spiking neural network for motion recognition. Each individual vision sensor consists of two parallel photodiodes with opposite polarities and has a temporal resolution of 5 μs. In response to changes in light intensity, the sensors generate spiking signals with different amplitudes and polarities by electrically programming their individual photoresponsivity. The non-volatile and multilevel photoresponsivity of the vision sensors can emulate synaptic weights and can be used to create an in-sensor spiking neural network. Our computational event-driven vision sensor approach eliminates redundant data during the sensing process, as well as the need for data transfer between sensors and computation units. A spiking neural network that is based on event-driven vision sensors can be created using two parallel photodiodes of opposite polarities that output programmable spike signal trains in response to changes in light intensity.

This paper reports a simple method of fabricating self-aligned offset gate （SAOG） polycrystalline silicon （poly-Si） thin film transistors （TFTs）. The SAOG structure was formed by two key steps, i.e. an isotropic photoresist trimming and an additional gate fringe etching. The fabricated SAOG devices with this proposed method exhibit a significantly suppressed off-current increase with gate bias compared with the non-offset ones, and have identical bi-directional transfer characteristics under reversed source/drain biases. It is also shown that the performances of poly-Si TFTs with metal-induced lateral crystallization can be improved significantly by annealing in forming gas.

Avalanche field-effect transistors (AFETs) based on two-dimensional (2D) materials have attracted growing interest in optoelectronics due to their enhanced performance via carrier multiplication and their potential applications in nanoelectronics. However, most AFETs employing 2D materials face challenges with high breakdown fields and low ionization indexes, which limit their applications in optoelectronics. Here, we report a ReSe2-based AFET that achieves a breakdown electric field down to 2.55 kVcm-1 and an ionization index up to 38.79. This performance is attributed to using anisotropic ReSe2 as the channel material, which reduces unnecessary carrier collisions. Moreover, the incorporation of HfZrO2 as the dielectric enhances gate modulation, which further mitigates scattering effects. The underlying mechanism is validated through calculations of electron effective masses along both in- and out-of-plane directions. Moreover, scattering probability within ReSe2 based on simulation model and experimental data further corroborates the proposed mechanism. As a demonstration, ReSe2 avalanche phototransistors with a high responsivity of 1.71×104 AW-1 and a high gain of 173 are realized based on this platform. By incorporating anisotropic 2D materials and high-k dielectric with less carrier scattering, this AFET design provides a promising pathway for developing high-performance avalanche photodetectors.Avalanche field-effect transistors (AFETs) based on two-dimensional (2D) materials have attracted growing interest in optoelectronics due to their enhanced performance via carrier multiplication and their potential applications in nanoelectronics. However, most AFETs employing 2D materials face challenges with high breakdown fields and low ionization indexes, which limit their applications in optoelectronics. Here, we report a ReSe2-based AFET that achieves a breakdown electric field down to 2.55 kVcm-1 and an ionization index up to 38.79. This performance is attributed to using anisotropic ReSe2 as the channel material, which reduces unnecessary carrier collisions. Moreover, the incorporation of HfZrO2 as the dielectric enhances gate modulation, which further mitigates scattering effects. The underlying mechanism is validated through calculations of electron effective masses along both in- and out-of-plane directions. Moreover, scattering probability within ReSe2 based on simulation model and experimental data further corroborates the proposed mechanism. As a demonstration, ReSe2 avalanche phototransistors with a high responsivity of 1.71×104 AW-1 and a high gain of 173 are realized based on this platform. By incorporating anisotropic 2D materials and high-k dielectric with less carrier scattering, this AFET design provides a promising pathway for developing high-performance avalanche photodetectors.

Electromagnetic metasurfaces have been intensively used as ultra-compact and easy-to-integrate platforms for versatile wave manipulations from optical to terahertz (THz) and millimeter wave (MMW) ranges. In this paper, the less investigated effects of the interlayer coupling of multiple metasurfaces cascaded in parallel are intensively exploited and leveraged for scalable broadband spectral regulations. The hybridized resonant modes of cascaded metasurfaces with interlayer couplings are well interpreted and simply modeled by the transmission line lumped equivalent circuits, which are used in return to guide the design of the tunable spectral response. In particular, the interlayer gaps and other parameters of double or triple metasurfaces are deliberately leveraged to tune the inter-couplings for as-required spectral properties, i.e., the bandwidth scaling and central frequency shift. As a proof of concept, the scalable broadband transmissive spectra are demonstrated in the millimeter wave (MMW) range by cascading multilayers of metasurfaces sandwiched together in parallel with low-loss dielectrics (Rogers 3003). Finally, both the numerical and experimental results confirm the effectiveness of our cascaded model of multiple metasurfaces for broadband spectral tuning from a narrow band centered at 50 GHz to a broadened range of 40~55 GHz with ideal side steepness, respectively.