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Spins of electrons in silicon MOS quantum dots combine exquisite quantum properties and scalable fabrication. In the age of quantum technology, however, the metrics that crowned Si/SiO 2 as the microelectronics standard need to be reassessed with respect to their impact upon qubit performance. We chart spin qubit variability due to the unavoidable atomic-scale roughness of the Si/SiO 2 interface, compiling experiments across 12 devices, and develop theoretical tools to analyse these results. Atomistic tight binding and path integral Monte Carlo methods are adapted to describe fluctuations in devices with millions of atoms by directly analysing their wavefunctions and electron paths instead of their energy spectra. We correlate the effect of roughness with the variability in qubit position, deformation, valley splitting, valley phase, spin-orbit coupling and exchange coupling. These variabilities are found to be bounded, and they lie within the tolerances for scalable architectures for quantum computing as long as robust control methods are incorporated. Understanding the microscopic variability of CMOS spin qubits is crucial for developing scalable quantum processors. Here the authors report a combined experimental and numerical study of the effect of interface roughness on variability of quantum dot spin qubits formed at the Si/SiO 2 interface.

Quantum computers leverage entanglement to achieve superior computational power. However, verifying that the entangled state does not follow the principle of local causality has proven difficult for spin qubits in gate-defined quantum dots, as it requires simultaneously high concurrence values and readout fidelities to break the classical bound imposed by Bell’s inequality. While low error rates for state preparation, control, and measurement have been independently demonstrated, a simultaneous demonstration remained challenging. We employ advanced protocols like heralded initialization and calibration via gate set tomography (GST), to push fidelities of the full 2-qubit gate set above 99%, including state preparation and measurement (SPAM). We demonstrate a 97.17% Bell state fidelity without correcting for readout errors and violate Bell’s inequality using direct parity readout with a Bell signal of S = 2.731. Our measurements exceed the classical limit even at 1.1 K or entanglement lifetimes of 100  μ s. Violating Bell’s inequality in a silicon quantum dot qubit system is a key milestone, as it proves quantum entanglement, fundamental to achieving quantum advantage. Silicon-based spin qubits are promising candidates for a scalable quantum computer. Here the authors demonstrate the violation of Bell’s inequality in gate-defined quantum dots in silicon, marking a significant advancement that showcases the maturity of this platform.

The encoding of qubits in semiconductor spin carriers has been recognized as a promising approach to a commercial quantum computer that can be lithographically produced and integrated at scale 1 – 10 . However, the operation of the large number of qubits required for advantageous quantum applications 11 – 13 will produce a thermal load exceeding the available cooling power of cryostats at millikelvin temperatures. As the scale-up accelerates, it becomes imperative to establish fault-tolerant operation above 1 K, at which the cooling power is orders of magnitude higher 14 – 18 . Here we tune up and operate spin qubits in silicon above 1 K, with fidelities in the range required for fault-tolerant operations at these temperatures 19 – 21 . We design an algorithmic initialization protocol to prepare a pure two-qubit state even when the thermal energy is substantially above the qubit energies and incorporate radiofrequency readout to achieve fidelities up to 99.34% for both readout and initialization. We also demonstrate single-qubit Clifford gate fidelities up to 99.85% and a two-qubit gate fidelity of 98.92%. These advances overcome the fundamental limitation that the thermal energy must be well below the qubit energies for the high-fidelity operation to be possible, surmounting a main obstacle in the pathway to scalable and fault-tolerant quantum computation. Initialization and operation of spin qubits in silicon above 1 K reach fidelities sufficient for fault-tolerant operations at these temperatures.

Once called a ‘classically non-describable two-valuedness’ by Pauli, the electron spin forms a qubit that is naturally robust to electric fluctuations. Paradoxically, a common control strategy is the integration of micromagnets to enhance the coupling between spins and electric fields, which, in turn, hampers noise immunity and adds architectural complexity. Here we exploit a switchable interaction between spins and orbital motion of electrons in silicon quantum dots, without a micromagnet. The weak effects of relativistic spin–orbit interaction in silicon are enhanced, leading to a speed up in Rabi frequency by a factor of up to 650 by controlling the energy quantization of electrons in the nanostructure. Fast electrical control is demonstrated in multiple devices and electronic configurations. Using the electrical drive, we achieve a coherence time T 2,Hahn  ≈ 50 μs, fast single-qubit gates with T π/2  = 3 ns and gate fidelities of 99.93%, probed by randomized benchmarking. High-performance all-electrical control improves the prospects for scalable silicon quantum computing. High-performance all-electrical control is a prerequisite for scalable silicon quantum computing. The switchable interaction between spins and orbital motion of electrons in silicon quantum dots now enables the electrical control of a spin qubit with high fidelity and speed, without the need for integrating a micromagnet.

Taking aim at silicon Silicon transistors in microelectronics are shrinking to close to the size at which quantum effects begin to have an impact on device performance. As silicon looks certain to remain the semiconductor material of choice for a while yet, such effects may be turned into an advantage by designing silicon devices that can process quantum information. One approach is to make use of electron spins generated by phosphorus dopant atoms buried in silicon, as they are known to represent well-isolated quantum bits (qubits) with long coherence times. It has not been possible to control single electrons in silicon with the precision for qubits, but now Andrea Morello and colleagues report single-shot, time-resolved readout of electron spins in silicon. This is achieved by placing the phosphorus donor atoms near a charge-sensing device called a single-electron transistor, which is fully compatible with current microelectronic technology. The demonstrated high-fidelity single-shot spin readout opens a path to the development of a new generation of quantum computing and spintronic devices in silicon. Electron spins generated by phosphorus dopant atoms buried in silicon represent well-isolated quantum bits with long coherence times, but so far the control of such single electrons has been insufficient to use them in this way. These authors report single-shot, time-resolved readout of electron spins in silicon, achieved by coupling the donor atoms to a charge-sensing device called a single-electron transistor. This opens a path to the development of a new generation of quantum computing and spintronic devices in silicon. The size of silicon transistors used in microelectronic devices is shrinking to the level at which quantum effects become important 1 . Although this presents a significant challenge for the further scaling of microprocessors, it provides the potential for radical innovations in the form of spin-based quantum computers 2 , 3 , 4 and spintronic devices 5 . An electron spin in silicon can represent a well-isolated quantum bit with long coherence times 6 because of the weak spin–orbit coupling 7 and the possibility of eliminating nuclear spins from the bulk crystal 8 . However, the control of single electrons in silicon has proved challenging, and so far the observation and manipulation of a single spin has been impossible. Here we report the demonstration of single-shot, time-resolved readout of an electron spin in silicon. This has been performed in a device consisting of implanted phosphorus donors 9 coupled to a metal-oxide-semiconductor single-electron transistor 10 , 11 —compatible with current microelectronic technology. We observed a spin lifetime of ∼6 seconds at a magnetic field of 1.5 tesla, and achieved a spin readout fidelity better than 90 per cent. High-fidelity single-shot spin readout in silicon opens the way to the development of a new generation of quantum computing and spintronic devices, built using the most important material in the semiconductor industry.

Achieving high-fidelity entangling operations between qubits consistently is essential for the performance of multi-qubit systems and is a crucial factor in achieving fault-tolerant quantum processors. Solid-state platforms are particularly exposed to errors due to materials-induced variability between qubits, which leads to performance inconsistencies. Here we study the errors in a spin qubit processor, tying them to their physical origins. We leverage this knowledge to demonstrate consistent and repeatable operation with above 99% fidelity of two-qubit gates in the technologically important silicon metal-oxide-semiconductor (SiMOS) quantum dot platform. We undertake a detailed study of these operations by analysing the physical errors and fidelities in multiple devices through numerous trials and extended periods to ensure that we capture the variation and the most common error types. Physical error sources include the slow nuclear and electrical noise on single qubits and contextual noise. The identification of the noise sources can be used to maintain performance within tolerance as well as inform future device fabrication. Furthermore, we investigate the impact of qubit design, feedback systems, and robust gates on implementing scalable, high-fidelity control strategies. These results are achieved by using three different characterization methods, we measure entangling gate fidelities ranging from 96.8% to 99.8%. Our analysis tools identify the causes of qubit degradation and offer ways understand their physical mechanisms. These results highlight both the capabilities and challenges for the scaling up of silicon spin-based qubits into full-scale quantum processors.

The boom of semiconductor quantum computing platforms created a demand for computer-aided design and fabrication of quantum devices. Path integral Monte Carlo (PIMC) can have an important role in this effort because it intrinsically integrates strong quantum correlations that often appear in these multi-electron systems. In this paper we present a PIMC algorithm that estimates exchange interactions of three-dimensional electrically defined quantum dots. We apply this model to silicon metal-oxide-semiconductor (MOS) devices and we benchmark our method against well-tested full configuration interaction (FCI) simulations. As an application, we study the impact of a single charge trap on two exchanging dots, opening the possibility of using this code to test the tolerance to disorder of CMOS devices. This algorithm provides an accurate description of this system, setting up an initial step to integrate PIMC algorithms into development of semiconductor quantum computers.

Spins of electrons in CMOS quantum dots combine exquisite quantum properties and scalable fabrication. In the age of quantum technology, however, the metrics that crowned Si/SiO2 as the microelectronics standard need to be reassessed with respect to their impact upon qubit performance. We chart the spin qubit variability due to the unavoidable atomic-scale roughness of the Si/SiO\\(_2\\) interface, compiling experiments in 12 devices, and developing theoretical tools to analyse these results. Atomistic tight binding and path integral Monte Carlo methods are adapted for describing fluctuations in devices with millions of atoms by directly analysing their wavefunctions and electron paths instead of their energy spectra. We correlate the effect of roughness with the variability in qubit position, deformation, valley splitting, valley phase, spin-orbit coupling and exchange coupling. These variabilities are found to be bounded and lie within the tolerances for scalable architectures for quantum computing as long as robust control methods are incorporated.

Quantum processors based on integrated nanoscale silicon spin qubits are a promising platform for highly scalable quantum computation. Current CMOS spin qubit processors consist of dense gate arrays to define the quantum dots, making them susceptible to crosstalk from capacitive coupling between a dot and its neighbouring gates. Small but sizeable spin-orbit interactions can transfer this electrostatic crosstalk to the spin g-factors, creating a dependence of the Larmor frequency on the electric field created by gate electrodes positioned even tens of nanometers apart. By studying the Stark shift from tens of spin qubits measured in nine different CMOS devices, we developed a theoretical frawework that explains how electric fields couple to the spin of the electrons in increasingly complex arrays, including those electric fluctuations that limit qubit dephasing times \\(T_2^*\\). The results will aid in the design of robust strategies to scale CMOS quantum technology.