Search Results Heading

MBRLSearchResults

mbrl.module.common.modules.added.book.to.shelf
Title added to your shelf!
View what I already have on My Shelf.
Oops! Something went wrong.
Oops! Something went wrong.
While trying to add the title to your shelf something went wrong :( Kindly try again later!
Are you sure you want to remove the book from the shelf?
Oops! Something went wrong.
Oops! Something went wrong.
While trying to remove the title from your shelf something went wrong :( Kindly try again later!
    Done
    Filters
    Reset
  • Discipline
      Discipline
      Clear All
      Discipline
  • Is Peer Reviewed
      Is Peer Reviewed
      Clear All
      Is Peer Reviewed
  • Item Type
      Item Type
      Clear All
      Item Type
  • Subject
      Subject
      Clear All
      Subject
  • Year
      Year
      Clear All
      From:
      -
      To:
  • More Filters
1 result(s) for "Simariya, Dipika"
Sort by:
A Novel MSPLL-Based Method for Frequency Synthesis in Hydrogen MASER
Frequency synthesis is an important aspect of an atomic clock. It is also imperative that the synthesized frequency exhibits good short term stability or, in other words, exhibits good phase noise. Conventionally single-PLL-system-based approaches have been made for realizing the frequency synthesizers required for hydrogen maser atomic clocks. In this article, a novel approach involving a master–slave-based phase-locked loop (MSPLL) method is presented for frequency synthesis in a hydrogen maser atomic clock. The novelty of this paper lies in the fact that the way two phase-locked loops are coupled to obtain advantage in improving the master oscillator’s stability to match maser physics subsystem stability and at the same time achieving lower jitter by the design. The design involves the usage of a master and a slave phase-locked loop with coupled custom designed direct digital synthesizers for ensuring that the hydrogen maser’s frequency stability is transferred to the master oscillator. The slave PLL (SPLL) generates a low jitter clock for the master PLL (MPLL), thereby guaranteeing reliable tracking of the input reference of 10 MHz, obtained by down-converting the maser physics subsystem frequency of ∼1.4 GHz. A novel mathematical model was derived for the proposed MSPLL design which aids in determination of the settling time of phase, which in turn, leads to the investigation of jitter variance in time domain. A detailed study and analysis of the settling time, phase noise in frequency domain, phase jitter in time domain. and stability performance is presented. The results were validated by the experimental data. The realized frequency synthesizer deduced a settling time of phase that can be adjusted between 689 μs to 811 μs. The synthesized frequency’s phase noise is ≤−114 dBc/Hz at 1 Hz offset, and it was observed that this design induces a very low phase noise to the output signal with respect to the physics subsystem. The achieved short-term stability of the output signal at 1 s is approximately (7.66 × 10−12) τ−1/2, which is very close to the physics subsystem stability. In terms of stability degradation factor, the proposed MSPLL design exhibits an excellent short-term stability that is one order better than that of the existing methods.