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Cervical canal stenosis, localized to upper cervical spine, is very rare which can be developmental or acquired. Hypertrophic osteoarthritis accompanied by dens hypertrophy, hypertrophy of the osodontoideum, ossification of the transverse atlantal ligament, aplasia or developmental defect of the posterior arches of Atlas, and unilateral lateral mass hypertrophy are some of the rare reported conditions causing cervical myelopathy. Localized upper cervical canal stenosis due to hypertrophied C1 posterior arch and C2 laminae hypertrophy as an isolated cause of cervical myelopathy has not been reported earlier to our knowledge. We report a case of cervical myelopathy in a 52-year-old gentleman due to the hypertrophied posterior arch of atlas and laminae of axis. C2 laminectomy along with removal of the posterior arch of Atlas and decompression is the treatment. No adjuvant radiotherapy or chemotherapy is needed. The knowledge of such an entity will avoid surprises in the diagnosis and facilitates the management.

We have developed a unique processing technique to fabricate Zinc (Zn) nanocomposites with controlled microstructures. In this method, pulsed laser deposition of Zn in conjunction with a few monolayers of tungsten (W) is used to control the grain size of nanocrystalline composites. The grain size of Zn was controlled by the amount of Zn and the substrate temperature. The Zn islands of lower surface energy nucleate on W-layer of high surface energy, which is also insoluble in Zn resulting in lower interfacial energy. Using this approach, we have fabricated nanocomposites of grain sizes ranging from 30nm down to 6nm. The hardness of these nanocrystalline films increases with the decrease in grain size, following approximately Hall-Petch relationship. The most interesting observation is the decrease in hardness below a critical size, which is explained on the basis of grain boundary deformation/sliding. The role of W in grain boundary deformation is of particular interest in strengthening and stabilizing the nanocrystalline composites. The potential of this technique to attain even lower grain sizes is discussed.[PUBLICATION ABSTRACT]

Scalable standby power is achieved by exploiting typical charge leakage instead of worst-case charge leakage. Most DRAM cells have very low leakage currents and consequently long retention times. However, sparse outliers have high leakage currents and short retention times, and are the cause for frequent refreshes of the whole DRAM. More generally, retention times of DRAM cells and even whole pages vary widely, with an average retention time on the order of seconds. We propose Retention-Aware Placement in DRAM (RAPID), novel software techniques that can exploit off-the-shelf DRAMs to reduce refresh power to vanishingly small levels. The key idea is to favor allocation of longer-retention pages over shorter-retention pages, and then select a single refresh period that depends on the shortest-retention page among populated pages instead of the shortest-retention page overall. This refresh period is much higher than the default refresh period of commodity DRAMs, thereby significantly reducing the frequency of refreshes. To overcome DRAM voltage scaling limits, we explore the long-term power-scalability of ZettaRAM™, a nascent DRAM technology. ZettaRAM is based on conventional DRAM architectures but replaces the DRAM capacitor with a new molecular capacitor. The molecular capacitor is fully charged/discharged if the applied voltage is above/below a discrete threshold voltage. Therefore, unlike a conventional capacitor, the amount of charge deposited on the molecular capacitor is independent of applied voltage. Charge-voltage decoupling holds the key for viable voltage scaling from one generation to the next and opens up two unprecedented power scaling opportunities. (1) Exploiting molecular engineering for long-term power scalability: Read/write operations can be performed at lower voltages, while still maintaining the minimum amount of charge needed for reliable sensing. Precise tuning of molecular attributes provides an inexpensive path for scaling voltage, hence power, from one generation to the next, whereas conventional DRAM requires major cell redesigns to maintain a fixed charge while scaling voltage. (2) Intelligent management of ZettaRAM: While the fixed charge is voltage-independent, speed is voltage-dependent. Thus, the applied voltage is padded to achieve the same speed as DRAM. A key architectural insight is leveraged to manage the speed-voltage dependence and lower the voltage even further: most of the bitline activity is caused by non-critical L2-cache writeback requests. Accordingly, slow operations (lower voltage) are applied to non-critical writebacks and fast operations (higher voltage) to critical fetches. (Abstract shortened by UMI.)

Training and serving Large Language Models (LLMs) relies heavily on parallelization and collective operations, which are frequently bottlenecked by network bandwidth. Lossless compression using e.g., Huffman codes can alleviate the issue, however, Huffman codes suffer from slow, bit-sequential decoding and high hardware complexity due to deep tree traversals. Universal codes e.g., Exponential-Golomb codes are faster to decode but do not exploit the symbol frequency distributions. To address these limitations, this paper introduces Quad Length Codes, a hybrid approach designed to balance compression efficiency with decoding speed. The coding scheme uses 3 prefix bits to divide the 256 symbols into 8 areas. Each area has a different code length and encodes a different number of symbols. The scheme uses a Look Up Table with 256 entries, significantly simplifying the hardware implementation compared to Huffman trees. The coding scheme can be adapted for different distributions. For the e4m3 data type, the scheme achieves a compressibility of 13.9% in comparison to 15.9% achieved by Huffman codes, but it significantly speeds up the decoding and simplifies the hardware complexity.

Training and serving Large Language Models (LLMs) require partitioning data across multiple accelerators, where collective operations are frequently bottlenecked by network bandwidth. Lossless compression using Huffman codes is an effective way to alleviate the issue, however, its three-stage design requiring on-the-fly frequency analysis, codebook generation and transmission of codebook along with data introduces computational, latency and data overheads which are prohibitive for latency-sensitive scenarios such as die-to-die communication. This paper proposes a single-stage Huffman encoder that eliminates these overheads by using fixed codebooks derived from the average probability distribution of previous data batches. Through our analysis of the Gemma 2B model, we demonstrate that tensors exhibit high statistical similarity across layers and shards. Using this approach we achieve compression within 0.5% of per-shard Huffman coding and within 1% of the ideal Shannon compressibility, enabling efficient on-the-fly compression.

Between 2003 and 2011, Kodak gradually cost-cut its way to oblivion shedding 47,000 jobs, 13 manufacturing plants and 130 processing labs. It never made a profit after 2004; by 2012, having run out of cash, Kodak declared bankruptcy and was delisted from the New York Stock Exchange. [...]Kodak's arch rival and perennial number 2, Fuji Film managed to successfully diversify into cosmetics, optical films and chemicals, and survives with a market cap of $19 billion. Over just 18 months, he restructured Fuji, slashing costs and jobs, shedding factories, development labs, distributors and employees to improve cash flow. When a company is sitting on lots of cash, fat margins and a good market share, it's hard to create a sense of urgency in the organisation and among its shareholders. The need to somehow deliver quarterly earnings, serve existing customers, maintain profit margins, manage the many daily operational challenges, all consume the...