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CMOS millimeter-wave integrated circuits for next generation wireless communication systems
\"This book addresses in-depth technical issues, limitations, considerations and challenges facing millimeter-wave (MMW) integrated circuit and system designers in designing MMW wireless communication systems from the complementary metal-oxide semiconductor (CMOS) perspective. It offers both a comprehensive explanation of fundamental theories and a broad coverage of MMW integrated circuits and systems. CMOS Millimeter-Wave Integrated Circuits for Next Generation Wireless Communication Systems is an excellent reference for faculty, researchers and students working in electrical and electronic engineering, wireless communication, integrated circuit design and circuits and systems. While primarily written for upper-level undergraduate courses, it is also an excellent introduction to the subject for instructors, graduate students, researchers, integrated circuit designers and practicing engineers. Advanced readers could also benefit from this book as it includes many recent state-of-the-art MMW circuits.\" -- Provided by publisher.
Book
Hermite Expansion Technique for Model Reduction of Circuit Systems with Delay Components
Model order reduction technique provides an effective way to reduce computational complexity in large-scale circuit simulations. This paper proposes a new model order reduction method for delay circuit systems based on Hermite expansion technique. The presented method consists of three steps i.e., first the delay elements are approximated using the recursive relation of Hermite polynomials, then in the second step, the reduced order is estimated for the delay circuit system using a delay truncation in the Hermite domain and in the third step, a multi-order Arnoldi process is computed for obtaining the projection matrix. In the following, the reduced order delay circuit model is obtained by the projection matrix. Moment matching and passivity properties of the reduced circuit system are also analyzed. Two circuit examples with delay components are performed to verify the effectiveness of the proposed MOR approach.
Journal Article
Learning FPGAs : digital design for beginners with Mojo and Lucid HDL
\"Learn how to design digital circuits with FPGAs (field-programmable gate arrays), the devices that reconfigure themselves to become the very hardware circuits you set out to program. With this practical guide, author Justin Rajewski shows you hands-on how to create FPGA projects, whether you're a programmer, engineer, product designer, or maker. You'll quickly go from the basics to designing your own processor. Designing digital circuits used to be a long and costly endeavor that only big companies could pursue. FPGAs make the process much easier, and now they're affordable enough even for hobbyists. If you're familiar with electricity and basic electrical components, this book starts simply and progresses through increasingly complex projects\"--Publisher's description.
Book
Simple Structure Controller Design for Exponential Stabilization of Feedforward Nonlinear Time-Delay Systems
This paper proposes a simple but effective method for constructing the state feedback controller to solve the exponential stabilization problem for a class of feedforward nonlinear systems subject to different time-delay states. The form of state feedback controller, which depends on a positive parameter to be determined, is firstly presented. And then, by considering the Lyapunov-Krasovskii functional with exponential term and taking the appropriate positive parameter, the state feedback controller is achieved to ensure the exponential stability of the closed-loop system. Finally, the proposed design scheme is utilized to the control design of resonant circuit system.
Journal Article
A 10‐bit 13.3 µW single‐slope analog‐to‐digital converter with auto‐zero power‐down technique
This letter presents a low‐power single‐slope analog‐to‐digital converter (ADC) for column‐parallel architectures. A simple and effective design technique is proposed to solve the input‐dependent power consumption problem of the conventional single‐slope ADCs. A decision‐feedback loop is implemented in the second stage of the comparator. Based on the negative‐feedback path, which is activated after the signal decision of the comparator, the input‐dependent dynamic current path in the amplifier is disabled. Furthermore, an additional low‐power design technique is proposed to save the power consumption of the ADC by optimizing the offset cancelling auto‐zero period. With the combination of the proposed techniques, the power consumption of the single‐slope ADC can be effectively saved while suppressing the dynamic current. Based on the negative‐feedback path, which is activated after the signal decision of the comparator, the input‐dependent dynamic current path in the amplifier is disabled. Furthermore, an additional low‐power design technique is proposed to save the power consumption of the analog‐to‐digital converter (ADC) by optimizing the offset cancelling auto‐zero period. With the combination of the proposed techniques, the power consumption of the single‐slope ADC can be effectively saved while suppressing the dynamic current.
Journal Article
ASIC/SoC functional design verification : a comprehensive guide to technologies and methodologies
This book describes in detail all required technologies and methodologies needed to create a comprehensive, functional design verification strategy and environment to tackle the toughest job of guaranteeing first-pass working silicon. The author first outlines all of the verification sub-fields at a high level, with just enough depth to allow an.
eBook
Non-Volatile In-Memory Computing by Spintronics
Exa-scale computing needs to re-examine the existing hardware platform that can support intensive data-oriented computing. Since the main bottleneck is from memory, we aim to develop an energy-efficient in-memory computing platform in this book. First, the models of spin-transfer torque magnetic tunnel junction and racetrack memory are presented. Next, we show that the spintronics could be a candidate for future data-oriented computing for storage, logic, and interconnect. As a result, by utilizing spintronics, in-memory-based computing has been applied for data encryption and machine learning. The implementations of in-memory AES, Simon cipher, as well as interconnect are explained in details. In addition, in-memory-based machine learning and face recognition are also illustrated in this book.
eBook
Transformers in Time-Series Analysis: A Tutorial
Transformer architectures have widespread applications, particularly in Natural Language Processing and Computer Vision. Recently, Transformers have been employed in various aspects of time-series analysis. This tutorial provides an overview of the Transformer architecture, its applications, and a collection of examples from recent research in time-series analysis. We delve into an explanation of the core components of the Transformer, including the self-attention mechanism, positional encoding, multi-head, and encoder/decoder. Several enhancements to the initial Transformer architecture are highlighted to tackle time-series tasks. The tutorial also provides best practices and techniques to overcome the challenge of effectively training Transformers for time-series analysis.
Journal Article
Scaling Fractal-Chuan Fractance Approximation Circuits of Arbitrary Order
The scaling fractal-chuan fractance approximation circuit (SFCFAC), which can realize the rational approximation of arbitrary-order fractances and has an excellent approximation performance, is presented in this paper. For an original SFCFAC, the progression ratios of resistance and capacitance are limited to the range 0–1. However, it is possible for the values of both progression ratios to be greater than one. The impedance function of an SFCFAC can be represented by an irregular scaling equation. By solving the scaling equation approximately, the operational order of an SFCFAC can be obtained using both progression ratios as \\[\\mu = -\\lg \\alpha /\\lg (\\alpha \\beta )\\]. Therefore, the SFCFAC has fractional operational characteristics, which is explained in theory. Oscillation phenomena are inherent to the SFCFAC. It is necessary to learn about these oscillation characteristics. The approximation performance can be improved by adding a series resistor and a series capacitor to the SFCFAC. The corresponding resistance and capacitance are determined by both progression ratios. The optimization has the advantages of simple operation, evident influence, and good practicality, which will make the SFCFAC competitive in future studies. Moreover, the values of the operational order of SFCFACs are extended from \\[-1<\\mu <0\\] to \\[0<|\\mu |<2\\] without using inductors, which is feasible for practical applications.
Journal Article