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These guidelines are intended for use by healthcare professionals who care for children and adults with suspected or confirmed infectious diarrhea. They are not intended to replace physician judgement regarding specific patients or clinical or public health situations. This document does not provide detailed recommendations on infection prevention and control aspects related to infectious diarrhea.

Pain has always been an important part of human immunodeficiency virus (HIV) disease and its experience for patients. In this guideline, we review the types of chronic pain commonly seen among persons living with HIV (PLWH) and review the limited evidence base for treatment of chronic noncancer pain in this population. We also review the management of chronic pain in special populations of PLWH, including persons with substance use and mental health disorders. Finally, a general review of possible pharmacokinetic interactions is included to assist the HIV clinician in the treatment of chronic pain in this population. It is important to realize that guidelines cannot always account for individual variation among patients. They are not intended to supplant physician judgment with respect to particular patients or special clinical situations. The Infectious Diseases Society of American considers adherence to these guidelines to be voluntary, with the ultimate determination regarding their application to be made by the physician in the light of each patient’s individual circumstances.

With the ever-growing demands for larger size and high resolution displays, Micro-light-emitting diode (Micro-LED) display with quantum dots (QDs) film as color conversion layers (CCLs) has become one of the most promising candidates of future display for its advantages in low power consumption and wide color range. In this study, we report a novel full-color display based on blue Micro LED, which has patterned red and green QDs color conversion (QDCC) layers fabricated by inkjet printing (IJP). A structure of double-layer bank was designed to reduce color deviation, prevent crosstalk, and flatten the QDCC layer. By optimizing the thickness of the red/green QDCC layers and the wavelength of blue Micro LED backlights, a full-color QDCC-LED display with 228 PPI resolution and size of 1.11-inch was successfully fabricated and showed superb performance. We not only effectively reduced crosstalk, but also improved the color conversion efficiency of QDs. In addition, this QDCC-LED display prepared by embedded bonding process shows a color gamut of 107.53% NTSC. Graphical Abstract

This review paper systematically analyzes the recent advancements in semiconductor packaging technology, focusing on hybrid bonding technology. Hybrid bonding is a crucial technique for enhancing integration density and thermal management in high-performance semiconductor devices by directly bonding metal to an insulator. It is categorized into wafer-to-wafer (W2W), die-to-wafer (D2W), and die-to-die (D2D) methods. This paper compares the characteristics, advantages, and limitations of each method while presenting technical approaches for performance improvements. Innovations such as new dielectric materials, surface and interface modifications, and optimizing the crystallinity and crystal orientation of metals can significantly enhance the reliability and performance of hybrid bonding. These strategies boost data transfer rates between memory and processors while reducing power consumption and improving overall system performance. This latest research on maximizing hybrid bonding performance is also discussed, emphasizing its potential in the next generation of memory technologies, including high bandwidth memory. This research lays a critical foundation for further advancements in high-performance 3D integrated circuit technology. Graphical Abstract

These days, the process of plasma etching is exhibited in various forms, including the reactive ion etching (RIE) method. Not only memory device but also computing element such as system semiconductor is becoming more important, and more in demand than ever. In tandem with that demand increase trend, semiconductor process should be sophisticated to manufacture extremely complex semiconductor device structure. However, the downscaling of semiconductor devices has given rise to certain limitations, such as etch profile, short channel effect (SCE), control of critical dimension and material selection. Therefore, to overcome these complex problems, atomic layer etching (ALE) technology was developed, which is more precise compared to the existing method by using repetitive process between modification (self-limiting) and removal. This study analyzes the overall trend of the ALE technology currently being investigated in the field of semiconductors. In particular, we describe the application of ALE to Si, Ge, W, GaN, SiO 2 layers, and graphene layers. Also the process of overcoming the above-mentioned limitations using ALE in semiconductor manufacturing processes. The ALE technology is considered as one of the leading new paradigms in the manufacture of semiconductor devices, such as improving 3D nanostructure device structure, High-K oxide etching, line edge/width roughness (LER/LWR), and the selective Atomic Layer Deposition (ALD) in the future. Atomic Layer Deposition (ALD) is a thin-film deposition process, one of chemical vapor deposition based on the sequential use of a gas-phase materials. Although there are limitations to be challenged, ALE technology will be as one of counterplan of conventional etching technology in post-semiconductor industry. Graphical Abstract

A panel of experts was convened by the Infectious Diseases Society of America (IDSA) to update the 2004 clinical practice guideline on outpatient parenteral antimicrobial therapy (OPAT). This guideline is intended to provide insight for healthcare professionals who prescribe and oversee the provision of OPAT. It considers various patient features, infusion catheter issues, monitoring questions, and antimicrobial stewardship concerns. It does not offer recommendations on the treatment of specific infections. The reader is referred to disease- or organism-specific guidelines for such support.

In this study, we examined the impact of crystal domain on the electrical performance and durability of flexible organic thin-film transistors (OTFTs). To analyze this, we fabricated the OTFTs on a polyimide substrate using 2,8-difluoro-5,11bis(triethylsilylethynyl)anthradithiophene (diF-TES-ADT) as the organic semiconductor. To examine the influence of the film morphology and crystallinity on the electrical characteristics of OTFTs, we dissolved diF-TES-ADT in chlorobenzene and toluene solvent, annealed it at different temperatures, and then evaluated its electrical performances. The optimum annealing temperature of the diF-TES-ADT OTFTs was determined through the comprehensive analysis of the electrical parameters. The film morphology and crystallinity of organic semiconductor as a function of temperature were examined using the technical measurement analysis such as the atomic force measurement, X-ray diffraction and polarized optic microscopy. Furthermore, we demonstrated the electrical degradation of the device under prolonged bending cycles and observed the effect of bending stress on the electrical performance of OTFTs. The size of the crystalline domain and surface morphology indicated a slower deterioration of OTFT performance with an increase in the number of bending cycles. It was approved that the crystal grain size and morphology of organic semiconductor may not be critical factors determining the electrical performance of OTFTs, however, the electrical durability against bending stress was significantly degraded by these factors. We speculate that the smaller grain sizes and directionally-grown crystalline structure are highly vulnerable to bending stress, resulting in increased occurrence of void cracks and structural defects. Graphical Abstract

The emergence of big data and artificial intelligence has promoted the semiconductor industry to increasingly adopt advanced three-dimensional stacking packaging technologies due to the limitations of device scaling. Traditional packaging methods, which rely on micro bumps and adhesives, struggle to meet the growing demands for sub-micrometer fine pitches. To address these challenges, bump-less direct bonding techniques, such as Cu/SiO₂ hybrid bonding, have gained attention, along with surface-activated bonding (SAB) using plasma treatment. However, plasma treatment poses risks, including Cu oxidation and potential short circuits from Cu particle transfer in fine-pitch applications. This study presents a novel plasma-free method that utilizes self-assembled monolayers (SAMs), thin molecular layers that spontaneously create ordered structures on surfaces, for dielectric surface activation. We deposited 3-aminopropyltriethoxysilane (APTES) on silicon dioxide (SiO₂), resulting in a hydrophilic layer that enhances bonding. Notably, a heat treatment significantly improved interfacial adhesion strength through the formation of an amorphous silicon (Si) layer. This SAM-based bonding technique, which enables dielectric surface without the need for plasma, holds promise for future fine-pitch hybrid bonding applications in 3D integrated packaging. Graphical abstract

Herein, we present indium tin oxide (ITO) as a promising candidate for developing adaptable standard resistors. The ITO thin-film device structures exhibit an average resistivity of approx. 1.5 × 10 –4 Ω ⋅ cm, demonstrating remarkable stability in resistance values over time and showcasing temperature-independent magnetoresistance, making them reliable for various applications. ITO resistor structures were found to be optimal with an area ≥10 –7 cm 2 , without observed additional series resistance. The temperature dependence of resistance values changes by approx. 10% within a broad temperature range of 5–310 K in a predictable and repeatable way. Unlike traditional 2D materials, ITO can be processed without the necessity of a protective layer, facilitating easier integration into electronic circuits. Moreover, ITO demonstrates single-type electron characteristics, without hole-like contributions, being particularly suitable as a charge carrier transport control. Our experimental findings indicate that resistors made of ITO-coated glass thin films present a viable alternative to standard chip-type passive components, which are commonly used in electronic devices. This work highlights the potential of ITO as a durable and flexible material for advanced electronics, enabling the design of next-generation resistive elements that can adapt to varying operational conditions. Graphical Abstract