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The color code is a topological quantum error-correcting code supporting a variety of valuable fault-tolerant logical gates. Its two-dimensional version, the triangular color code, may soon be realized with currently available superconducting hardware despite constrained qubit connectivity. To guide this experimental effort, we study the storage threshold of the triangular color code against circuit-level depolarizing noise. First, we adapt the Restriction Decoder to the setting of the triangular color code and to phenomenological noise. Then, we propose a fault-tolerant implementation of the stabilizer measurement circuits, which incorporates flag qubits. We show how information from flag qubits can be used in an efficient and scalable way with the Restriction Decoder to maintain the effective distance of the code. We numerically estimate the threshold of the triangular color code to be 0.2%, which is competitive with the thresholds of other topological quantum codes. We also prove that 1-flag stabilizer measurement circuits are sufficient to preserve the full code distance, which may be used to find simpler syndrome extraction circuits of the color code.

Quantum error correction 1 , 2 , 3 – 4 provides a path to reach practical quantum computing by combining multiple physical qubits into a logical qubit, in which the logical error rate is suppressed exponentially as more qubits are added. However, this exponential suppression only occurs if the physical error rate is below a critical threshold. Here we present two below-threshold surface code memories on our newest generation of superconducting processors, Willow: a distance-7 code and a distance-5 code integrated with a real-time decoder. The logical error rate of our larger quantum memory is suppressed by a factor of Λ  = 2.14 ± 0.02 when increasing the code distance by 2, culminating in a 101-qubit distance-7 code with 0.143% ± 0.003 per cent error per cycle of error correction. This logical memory is also beyond breakeven, exceeding the lifetime of its best physical qubit by a factor of 2.4 ± 0.3. Our system maintains below-threshold performance when decoding in real time, achieving an average decoder latency of 63 microseconds at distance 5 up to a million cycles, with a cycle time of 1.1 microseconds. We also run repetition codes up to distance 29 and find that logical performance is limited by rare correlated error events, occurring approximately once every hour or 3 × 10 9 cycles. Our results indicate device performance that, if scaled, could realize the operational requirements of large-scale fault-tolerant quantum algorithms. Two below-threshold surface code memories on superconducting processors markedly reduce logical error rates, achieving high efficiency and real-time decoding, indicating potential for practical large-scale fault-tolerant quantum algorithms.

Quantum computers hold the promise of solving computational problems that are intractable using conventional methods 1 . For fault-tolerant operation, quantum computers must correct errors occurring owing to unavoidable decoherence and limited control accuracy 2 . Here we demonstrate quantum error correction using the surface code, which is known for its exceptionally high tolerance to errors 3 – 6 . Using 17 physical qubits in a superconducting circuit, we encode quantum information in a distance-three logical qubit, building on recent distance-two error-detection experiments 7 – 9 . In an error-correction cycle taking only 1.1 μs, we demonstrate the preservation of four cardinal states of the logical qubit. Repeatedly executing the cycle, we measure and decode both bit-flip and phase-flip error syndromes using a minimum-weight perfect-matching algorithm in an error-model-free approach and apply corrections in post-processing. We find a low logical error probability of 3% per cycle when rejecting experimental runs in which leakage is detected. The measured characteristics of our device agree well with a numerical model. Our demonstration of repeated, fast and high-performance quantum error-correction cycles, together with recent advances in ion traps 10 , support our understanding that fault-tolerant quantum computation will be practically realizable. By using 17 physical qubits in a superconducting circuit to encode quantum information in a surface-code logical qubit, fast (1.1 μs) and high-performance (logical error probability of 3%) quantum error-correction cycles are demonstrated.

Practical quantum computing will require error rates well below those achievable with physical qubits. Quantum error correction 1 , 2 offers a path to algorithmically relevant error rates by encoding logical qubits within many physical qubits, for which increasing the number of physical qubits enhances protection against physical errors. However, introducing more qubits also increases the number of error sources, so the density of errors must be sufficiently low for logical performance to improve with increasing code size. Here we report the measurement of logical qubit performance scaling across several code sizes, and demonstrate that our system of superconducting qubits has sufficient performance to overcome the additional errors from increasing qubit number. We find that our distance-5 surface code logical qubit modestly outperforms an ensemble of distance-3 logical qubits on average, in terms of both logical error probability over 25 cycles and logical error per cycle ((2.914 ± 0.016)% compared to (3.028 ± 0.023)%). To investigate damaging, low-probability error sources, we run a distance-25 repetition code and observe a 1.7 × 10 −6 logical error per cycle floor set by a single high-energy event (1.6 × 10 −7 excluding this event). We accurately model our experiment, extracting error budgets that highlight the biggest challenges for future systems. These results mark an experimental demonstration in which quantum error correction begins to improve performance with increasing qubit number, illuminating the path to reaching the logical error rates required for computation. A study demonstrating increasing error suppression with larger surface code logical qubits, implemented on a superconducting quantum processor.

The accumulation of physical errors 1 – 3 prevents the execution of large-scale algorithms in current quantum computers. Quantum error correction 4 promises a solution by encoding k logical qubits onto a larger number n of physical qubits, such that the physical errors are suppressed enough to allow running a desired computation with tolerable fidelity. Quantum error correction becomes practically realizable once the physical error rate is below a threshold value that depends on the choice of quantum code, syndrome measurement circuit and decoding algorithm 5 . We present an end-to-end quantum error correction protocol that implements fault-tolerant memory on the basis of a family of low-density parity-check codes 6 . Our approach achieves an error threshold of 0.7% for the standard circuit-based noise model, on par with the surface code 7 – 10 that for 20 years was the leading code in terms of error threshold. The syndrome measurement cycle for a length- n code in our family requires n ancillary qubits and a depth-8 circuit with CNOT gates, qubit initializations and measurements. The required qubit connectivity is a degree-6 graph composed of two edge-disjoint planar subgraphs. In particular, we show that 12 logical qubits can be preserved for nearly 1 million syndrome cycles using 288 physical qubits in total, assuming the physical error rate of 0.1%, whereas the surface code would require nearly 3,000 physical qubits to achieve said performance. Our findings bring demonstrations of a low-overhead fault-tolerant quantum memory within the reach of near-term quantum processors. An end-to-end quantum error correction protocol that implements fault-tolerant memory on the basis of a family of low-density parity-check codes shows the possibility of low-overhead fault-tolerant quantum memory within the reach of near-term quantum processors.

Quantum error correction protects fragile quantum information by encoding it into a larger quantum system 1 , 2 . These extra degrees of freedom enable the detection and correction of errors, but also increase the control complexity of the encoded logical qubit. Fault-tolerant circuits contain the spread of errors while controlling the logical qubit, and are essential for realizing error suppression in practice 3 – 6 . Although fault-tolerant design works in principle, it has not previously been demonstrated in an error-corrected physical system with native noise characteristics. Here we experimentally demonstrate fault-tolerant circuits for the preparation, measurement, rotation and stabilizer measurement of a Bacon–Shor logical qubit using 13 trapped ion qubits. When we compare these fault-tolerant protocols to non-fault-tolerant protocols, we see significant reductions in the error rates of the logical primitives in the presence of noise. The result of fault-tolerant design is an average state preparation and measurement error of 0.6 per cent and a Clifford gate error of 0.3 per cent after offline error correction. In addition, we prepare magic states with fidelities that exceed the distillation threshold 7 , demonstrating all of the key single-qubit ingredients required for universal fault-tolerant control. These results demonstrate that fault-tolerant circuits enable highly accurate logical primitives in current quantum systems. With improved two-qubit gates and the use of intermediate measurements, a stabilized logical qubit can be achieved. Fault-tolerant circuits for the control of a logical qubit encoded in 13 trapped ion qubits through a Bacon–Shor quantum error correction code are demonstrated.

Realizing the potential of quantum computing requires sufficiently low logical error rates 1 . Many applications call for error rates as low as 10 −15 (refs. 2 – 9 ), but state-of-the-art quantum platforms typically have physical error rates near 10 −3 (refs. 10 – 14 ). Quantum error correction 15 – 17 promises to bridge this divide by distributing quantum logical information across many physical qubits in such a way that errors can be detected and corrected. Errors on the encoded logical qubit state can be exponentially suppressed as the number of physical qubits grows, provided that the physical error rates are below a certain threshold and stable over the course of a computation. Here we implement one-dimensional repetition codes embedded in a two-dimensional grid of superconducting qubits that demonstrate exponential suppression of bit-flip or phase-flip errors, reducing logical error per round more than 100-fold when increasing the number of qubits from 5 to 21. Crucially, this error suppression is stable over 50 rounds of error correction. We also introduce a method for analysing error correlations with high precision, allowing us to characterize error locality while performing quantum error correction. Finally, we perform error detection with a small logical qubit using the 2D surface code on the same device 18 , 19 and show that the results from both one- and two-dimensional codes agree with numerical simulations that use a simple depolarizing error model. These experimental demonstrations provide a foundation for building a scalable fault-tolerant quantum computer with superconducting qubits. Repetition codes running many cycles of quantum error correction achieve exponential suppression of errors with increasing numbers of qubits.

Random quantum circuits have played a central role in establishing the computational advantages of near-term quantum computers over their conventional counterparts. Here, we use ensembles of low-depth random circuits with local connectivity inD≥1spatial dimensions to generate quantum error-correcting codes. For random stabilizer codes and the erasure channel, we find strong evidence that a depthO(logN)random circuit is necessary and sufficient to converge (with high probability) to zero failure probability for any finite amount below the optimal erasure threshold, set by the channel capacity, for anyD. Previous results on random circuits have only shown thatO(N1/D)depth suffices or thatO(log3N)depth suffices for all-to-all connectivity (D→∞). We then study the critical behavior of the erasure threshold in the so-called moderate deviation limit, where both the failure probability and the distance to the optimal threshold converge to zero withN. We find that the requisite depth scales likeO(logN)only for dimensionsD≥2and that random circuits requireO(N)depth forD=1. Finally, we introduce an “expurgation” algorithm that uses quantum measurements to remove logical operators that cause the code to fail by turning them into either additional stabilizers or into gauge operators in a subsystem code. With such targeted measurements, we can achieve sublogarithmic depth inD≥2spatial dimensions below capacity without increasing the maximum weight of the check operators. We find that for any rate beneath the capacity, high-performing codes with thousands of logical qubits are achievable with depth 4–8 expurgated random circuits inD=2dimensions. These results indicate that finite-rate quantum codes are practically relevant for near-term devices and may significantly reduce the resource requirements to achieve fault tolerance for near-term applications.

Executing quantum algorithms on error-corrected logical qubits is a critical step for scalable quantum computing, but the requisite numbers of qubits and physical error rates are demanding for current experimental hardware. Recently, the development of error correcting codes tailored to particular physical noise models has helped relax these requirements. In this work, we propose a qubit encoding and gate protocol for 171 Yb neutral atom qubits that converts the dominant physical errors into erasures, that is, errors in known locations. The key idea is to encode qubits in a metastable electronic level, such that gate errors predominantly result in transitions to disjoint subspaces whose populations can be continuously monitored via fluorescence. We estimate that 98% of errors can be converted into erasures. We quantify the benefit of this approach via circuit-level simulations of the surface code, finding a threshold increase from 0.937% to 4.15%. We also observe a larger code distance near the threshold, leading to a faster decrease in the logical error rate for the same number of physical qubits, which is important for near-term implementations. Erasure conversion should benefit any error correcting code, and may also be applied to design new gates and encodings in other qubit platforms. In quantum computing, realistic error models can allow tailored correction schemes for specific platforms. Here, while considering the case of qubits encoded in metastable electronic levels of atomic arrays, the authors propose a way to convert a large fraction of occurring errors into detectable leakages, or erasure errors, which are vastly easier to correct.

To solve problems of practical importance 1 , 2 , quantum computers probably need to incorporate quantum error correction, in which a logical qubit is redundantly encoded in many noisy physical qubits 3 , 4 – 5 . The large physical-qubit overhead associated with error correction motivates the search for more hardware-efficient approaches 6 , 7 , 8 , 9 , 10 , 11 , 12 , 13 , 14 , 15 , 16 , 17 – 18 . Here, using a superconducting quantum circuit 19 , we realize a logical qubit memory formed from the concatenation of encoded bosonic cat qubits with an outer repetition code of distance d  = 5 (ref.  10 ). A stabilizing circuit passively protects cat qubits against bit flips 20 , 21 , 22 , 23 – 24 . The repetition code, using ancilla transmons for syndrome measurement, corrects cat qubit phase flips. We study the performance and scaling of the logical qubit memory, finding that the phase-flip correcting repetition code operates below the threshold. The logical bit-flip error is suppressed with increasing cat qubit mean photon number, enabled by our realization of a cat-transmon noise-biased CX gate. The minimum measured logical error per cycle is on average 1.75(2)% for the distance-3 code sections, and 1.65(3)% for the distance-5 code. Despite the increased number of fault locations of the distance-5 code, the high degree of noise bias preserved during error correction enables comparable performance. These results, where the intrinsic error suppression of the bosonic encodings enables us to use a hardware-efficient outer error-correcting code, indicate that concatenated bosonic codes can be a compelling model for reaching fault-tolerant quantum computation. Bosonic qubits can be engineered to feature intrinsic protection against certain kinds of errors, which makes quantum error correction across many bosonic qubits possible with less overhead.