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"Hardware"
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Smarter homes : how technology will change your home life
\"Over the past 100 years, the home has been a battleground for ideas of future living. Fueled by the electrification of cities, the move from the country to cities, post-war recovery and the development of the internet, the way we live at home (alone or with others) has changed beyond recognition. Science fiction writing, the entertainment industry, art, and modern interior design and architecture movements have also contributed to defining our aspirations around a future and now more present and possible `smart' home. From the decade-old smart fridge that tells you if you have run out of milk to smart speakers that let you shop hands-free, some visions of the 'smart' home are yet to excite us while others are becoming a reality and will shape how we will live at home very soon. This book breaks down the historical, societal and political context for the changes in focus of that `smartness' from affordability, efficiency, convenience to recently experimentation. These key points in time include: The development and marketing of electrical appliances in early 20th century; War-time design the impact of military ergonomics; Modernist interior design and building practices of the 1920s; The space race and new materials of the post-war era; Compact urban living in the 1960s & 70s; Connected home entertainment in the 1980s-90s; Phones and mobility in the 90s; Smart energy & utilities in the early 2000s; The internet-connected fridge in 2000; Remote care in a global world economy; The sharing economy and new ways to shop at home; Invisible `smart' design in the home. The second half of the book breaks down what current developments tell us about what our homes will look like in the next 10 years through the lens of spaces, services, appliances and behaviours in our homes. What You'll Learn-- Understand the historical context for current `smart home' products; Understand the social context of home product development; Understand what in home technologies are being developed; Understand what products are currently available; Understand what behaviours are being constantly leveraged; Understand how this may affect longer term market trends for consumer products. Many new and innovative products are being developed in the consumer and industrial spaces with a copy-paste mindset based on following larger businesses such as Amazon, Google and Apple. Many opportunities in the homespace however will come from understanding the history and multiple players that have contributed to the development of the home in general. For everyone working in product design and development, in R & D or in trends research as well as for everyone interested in the IT for the home, this book will be a valuable resource and an enjoyable read. This book will give product business owners ideas about what has been done before and and avenues for future development.\"--Publisher's description.
Ten years of hardware Trojans: a survey from the attacker's perspective
2020
Hardware Trojan detection techniques have been studied extensively. However, to develop reliable and effective defenses, it is important to figure out how hardware Trojans are implemented in practical scenarios. The authors attempt to make a review of the hardware Trojan design and implementations in the last decade and also provide an outlook. Unlike all previous surveys that discuss Trojans from the defender's perspective, for the first time, the authors study the Trojans from the attacker's perspective, focusing on the attacker's methods, capabilities, and challenges when the attacker designs and implements a hardware Trojan. First, the authors present adversarial models in terms of the adversary's methods, adversary's capabilities, and adversary's challenges in seven practical hardware Trojan implementation scenarios: in‐house design team attacks, third‐party intellectual property vendor attacks, computer‐aided design tools attacks, fabrication stage attacks, testing stage attacks, distribution stage attacks, and field‐programmable gate array Trojan attacks. Second, the authors analyse the hardware Trojan implementation methods under each adversarial model in terms of seven aspects/metrics: hardware Trojan attack scenarios, the attacker's motivation, feasibility, detectability (anti‐detection capability), protection and prevention suggestions for the designer, overhead analysis, and case studies of Trojan implementations. Finally, future directions on hardware Trojan attacks and defenses are also discussed.
Journal Article
Designer’s Guide to VHDL (3rd Edition)
2008,2010
VHDL, the IEEE standard hardware description language for describing digital electronic systems, allows engineers to describe the structure and specify the function of a digital system as well as simulate and test it before manufacturing. In addition, designers use VHDL to synthesize a more detailed structure of the design, freeing them to concentrate on more strategic design decisions and reduce time to market. Adopted by designers around the world, the VHDL family-of-standards have recently been revised to address a range of issues, including portability across synthesis tools. This best-selling comprehensive tutorial for the language and authoritative reference on its use in hardware design at all levels, from system to gates, has been revised to reflect the new IEEE standard, VHDL-2001. The author presents the entire description language and builds a modeling methodology based on successful software engineering techniques. This second edition updates the first, retaining the author’s unique ability to teach this complex subject to a broad audience of students and practicing professionals.
Hardware Design and Verification with Large Language Models: A Scoping Review, Challenges, and Open Issues
by
Abdollahi, Meisam
,
Baniasadi, Amirali
,
Baharloo, Mohammad (Amir)
in
20th century
,
Analysis
,
Artificial intelligence
2025
Background: Large Language Models (LLMs) are emerging as promising tools in hardware design and verification, with recent advancements suggesting they could fundamentally reshape conventional practices. Objective: This study examines the significance of LLMs in shaping the future of hardware design and verification. It offers an extensive literature review, addresses key challenges, and highlights open research questions in this field. Design: in this scoping review, we survey over 360 papers most of the published between 2022 and 2024, including 71 directly relevant ones to the topic, to evaluate the current role of LLMs in advancing automation, optimization, and innovation in hardware design and verification workflows. Results: Our review highlights LLM applications across synthesis, simulation, and formal verification, emphasizing their potential to streamline development processes while upholding high standards of accuracy and performance. We identify critical challenges, such as scalability, model interpretability, and the alignment of LLMs with domain-specific languages and methodologies. Furthermore, we discuss open issues, including the necessity for tailored model fine-tuning, integration with existing Electronic Design Automation (EDA) tools, and effective handling of complex data structures typical of hardware projects. Conclusions: this survey not only consolidates existing knowledge but also outlines prospective research directions, underscoring the transformative role LLMs could play in the future of hardware design and verification.
Journal Article
iPhone
Presents insight from two longtime Apple experts on how to master iPhone basics then move on to the coolest and most useful apps--and everything in between.
Multi-FPGA digital hardware design for detailed large-scale real-time electromagnetic transient simulation of power systems
by
Dinavahi, Venkata
,
Chen, Yuan
in
10‐FPGA real‐time hardware emulation
,
3‐FPGA real‐time hardware emulation
,
Applied sciences
2013
Large-scale electromagnetic transient simulation of power systems in real-time using detailed modelling is computationally very demanding. This study introduces a multi-field programmable gate array (FPGA) hardware design for this purpose. A functional decomposition method is proposed to map FPGA hardware resources to system modelling. This systematic method lends itself to fully pipelined and parallel hardware emulation of individual component models and numerical solvers, while preserving original system characteristics without the need for extraneous components to partition the system. Proof-of-concept is provided in terms of a 3-FPGA and 10-FPGA real-time hardware emulation of a three-phase 42-bus and 420-bus power systems using detailed modelling of various system components and iterative non-linear solution on a 100 MHz FPGA clock. Real-time results are compared with offline simulation results, and conclusions are derived on the performance and scalability of this multi-FPGA hardware design.
Journal Article
Programming FPGAs : getting started with Verilog
by
Monk, Simon, author
in
Field programmable gate arrays.
,
Verilog (Computer hardware description language)
2017
\"This fun guide shows how to get started with FPGA technology using the popular Mojo, Papilio One, and Elbert 2 boards. Written by electronics guru Simon Monk, Programming FPGAs: Getting Started with Verilog features clear explanations, easy-to-follow examples, and downloadable sample programs. You'll get start-to-finish assembly and programming instructions for numerous projects, including an LED decoder, a timer, a tone generator - even a memory-mapped video display! The book serves both as a hobbyists' guide and as an introduction for professional developers\"--Publisher's description.
Survey of hardware protection of design data for integrated circuits and intellectual properties
2014
This study reviews the current situation regarding design protection in the microelectronics industry. Over the past 10 years, the designers of integrated circuits (IC) and intellectual properties (IP) have faced increasing threats including counterfeiting, reverse‐engineering and theft. This is now a critical issue for the microelectronics industry, mainly for fabless designers and IP designers. Coupled with increasing pressure to decrease the cost and increase the performance of ICs, the design of a secure, efficient, lightweight protection scheme for design data is a serious challenge for the hardware security community. However, several published works propose different ways to protect design data including functional locking, hardware obfuscation and IC/IP identification. This study presents a survey of academic research on the protection of design data. It concludes with the need to design an efficient protection scheme based on several properties.
Journal Article