Explore the vast range of titles available.

An in-depth investigation was performed on a metallic interconnect extracted from an SOFC stack operated for 40,000 h. The characterization was performed on the surface and the cross-section, paying attention to the evolution of the materials due to the interaction with the dual atmosphere of the stack under operating parameters. The interaction between materials (i.e., metal substrate, coatings and atmospheres) and stack components (i.e., current collectors and MIC) generated several modifications that affected the surface and, in some cases, the bulk of the interconnect. The careful metallographic preparation allowed for the performance of an intensive microscopical characterization of the cross-sections all along the interconnect profile, from the inlet to the outlet of the fuel stream. The formation of thermal grown oxides on both sides and their evolution were studied and described. The interconnect, after 40,000 h, was still suitable for operation, but the few bulk changes due to the diffusion of Ni and the TGO that formed at the fuel side suggest the introduction of fuel side coatings to increase the life expectations of the whole stack.

In this paper we introduce the latest developments in the standardisation of quantum optical interconnect, in particular the formation of a new IEC standards committee on quantum optical interconnect and the first efforts to standardise a new category of “quantum grade” optical interconnect.

This reported research analyses and compares the bandwidth and absolute frequency response of a multi-layer graphene nanoribbon (MLGNR) and a multi-walled carbon nanotube (MWCNT) at local, semi-global and global interconnect lengths. The transfer function of the driver-interconnect-load system is obtained by representing the interconnect line with an equivalent single conductor model of either a MLGNR or a MWCNT. Using absolute frequency response, it is observed that the bandwidth of the MLGNR is higher by almost ten times and four times in comparison to the MWCNT for local and global interconnect lengths, respectively.

The purpose of the experiment was to indicate which element of the production process of flexible printed circuit boards is optimal in terms of the reliability of final products. According to the Taguchi method, in the experiment, five factors with two levels each were chosen for the subsequent analysis. These included the number of conductive layers, the thickness of the laminate layer, the type of the laminate, the diameter of the plated holes, and the current density in the galvanic bath. The reliability of the PCBs in the produced variations was verified using the Interconnect Stress Test environmental test. The qualitatively best variant of the board construction was indicated using the signal-to-noise ratio and the analysis of variance method for each factor. The factors determined to be the most important in terms of reliability were the number of conductive layers and the current density in the galvanic bath. The optimal variant of the board construction was two conductive layers on a polyimide laminate, where the laminate layer was 100 μm thick, the hole diameter was equal to 0.4 mm, and current density was 2 A/dm2 in the galvanic bath. Therefore, the plated experiment indicated the factors needed to obtain a high-quality product with a low failure rate.

Audio systems with unbalanced connections are susceptible to interference from ground loops, which manifests as hum and noise. This paper introduces and evaluates a novel passive Audio Interference Suppressor in Analog Audio Interface (AISAAI) designed to mitigate this problem. The AISAAI circuit is inserted between an audio device’s rectifier ground and its protective earth terminal, creating an optimized impedance path that reduces interference while ensuring safety. This approach is analyzed within a proposed Analog Audio Interconnection System (AAIS) framework. Experimental results show that common-mode voltages from protective earth potential differences are the primary source of interference. The optimized AISAAI suppressor achieves a consistent 15–30 dB reduction in measured audio interference across the audio band, regardless of the interconnect cable characteristics. This study confirms AISAAI as an effective solution for reducing ground loop noise in unbalanced audio systems and underlines the usefulness of the AAIS model for systemic analysis.

Following Moore’s law, the density of integrated circuits is increasing in all dimensions, for instance, in 3D stacked chip networks. Amongst other electro-optic solutions, multimode optical interconnects on a silicon interposer promise to enable high throughput for modern hardware platforms in a restricted space. Such integrated architectures require confidential communication between multiple chips as a key factor for high-performance infrastructures in the 5G era and beyond. Physical layer security is an approach providing information theoretic security among network participants, exploiting the uniqueness of the data channel. We experimentally project orthogonal and non-orthogonal symbols through 380 μm long multimode on-chip interconnects by wavefront shaping. These interconnects are investigated for their uniqueness by repeating these experiments across multiple channels and samples. We show that the detected speckle patterns resulting from modal crosstalk can be recognized by training a deep neural network, which is used to transform these patterns into a corresponding readable output. The results showcase the feasibility of applying physical layer security to multimode interconnects on silicon interposers for confidential optical 3D chip networks.

The advent of wearable electronic textiles (e-textiles) is transforming human–computer interaction by enabling seamless, comfortable, and continuous connectivity between users and digital systems. Although the wearable e-textile market is poised for significant growth, there is a need for durable, reliable connectors to link e-textiles to digital systems. This study presents and evaluates two novel magnetic connectors—buckle and snap—integrated into textile substrates using conductive epoxy, conductive stitches, and solder as interconnect methods. Durability testing involved 5000 mating/unmating cycles at low, medium, and high forces, with electrical performance assessed through resistance and impedance measurements. Results showed significant increases in resistance and impedance with 1000-cycle intervals. However, both connectors retained robust electrical and mechanical integrity, with all resistance values remaining below 1.6 Ω, indicating no critical degradation. Buckle connectors consistently outperformed snap connectors, which is attributed to their design that reduces mechanical stress on interconnects. Conductive epoxy demonstrated superior stability and slower degradation compared to conductive stitches and solder, particularly under higher mating forces. Impedance results mirrored resistance trends, confirming reliability. These findings advance durable, user-friendly connectors for long-term e-textile use, addressing both mechanical endurance and electrical performance to enhance wearable computing and interactive environments.

The rapid growth of artificial intelligence (AI), data centers, and high-performance computing (HPC) has increased the demand for large bandwidth, high energy efficiency, and high-density optical interconnects. Co-packaged optics (CPO) technology offers a promising solution by integrating photonic integrated circuits (PICs) directly within or close to electronic integrated circuit (EIC) packages. This paper explores the evolution of CPO performance from various perspectives, including fan-out wafer level packaging (FOWLP), through-silicon via (TSV)-based packaging, through-glass via (TGV)-based packaging, femtosecond laser direct writing waveguides, ion-exchange glass waveguides, and optical coupling. Micro ring resonators (MRRs) are a high-density integration solution due to their compact size, excellent energy efficiency, and compatibility with CMOS processes. However, traditional thermal tuning methods face limitations such as high static power consumption and severe thermal crosstalk. To address these issues, non-volatile neuromorphic photonics has made breakthroughs using phase-change materials (PCMs). By combining the integrated storage and computing capabilities of photonic memory with the efficient optoelectronic interconnects of CPO, this deep integration is expected to work synergistically to overcome material, integration, and architectural challenges, driving the development of a new generation of computing hardware with high energy efficiency, low latency, and large bandwidth.

Module-level free-space optical interconnects require actuators to combine both large stroke and high stability. To address this core trade-off that plagues traditional folded-beam actuators, we have developed a millimeter-scale MEMS electromagnetic actuator integrating a Differential Motion Rejection (DMR) unit with a rigid frame. Its performance was systematically evaluated through magnetic–structural coupling modeling, finite element simulation, and experiments. The actuator achieved millimeter-scale stroke under sinusoidal drive, with a primary resonant frequency of approximately 31 Hz. The introduction of the DMR and frame proved highly effective: the out-of-plane displacement at resonance was reduced by about 97%, the static Z-direction stiffness increased by over 50 times, and the displacement crosstalk decreased to 0.265%. Optical testing yielded a stable deflection angle of approximately ±21°. These results demonstrate that this design successfully combines large stroke with high stability, significantly suppressing out-of-plane parasitic motion and crosstalk, making it suitable for module-level optical interconnect systems with stringent space and stability requirements.

Copper sinter paste has been recently established as a robust die-attach material for high -power electronic packaging. This paper proposes and studies the implementation of copper sinter paste materials to create top-side interconnects, which can substitute wire bonds in power packages. Here, copper sinter paste was exploited as a fully printed interconnect and, additionally, as a copper clip-attach. The electrical and thermal performances of the copper-sinter paste interconnections (“sinterconnects”) were compared to a system with wire bonds. The results indicate comparable characteristics of the sinterconnect structures to the wire-bonded ones. Moreover, the performance of copper sinterconnects in a power module was further quantified at higher load currents via finite element analysis. It was identified that the full-area thermal and electrical contact facilitated by the planar sinterconnects can reduce ohmic losses and enhance the thermal management of the power packages.