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DD-αAMG on QPACE 3
We describe our experience porting the Regensburg implementation of the DD-αAMG solver from QPACE 2 to QPACE 3. We first review how the code was ported from the first generation Intel Xeon Phi processor (Knights Corner) to its successor (Knights Landing). We then describe the modifications in the communication library necessitated by the switch from InfiniBand to Omni-Path. Finally, we present the performance of the code on a single processor as well as the scaling on many nodes, where in both cases the speedup factor is close to the theoretical expectations.
Journal Article
The liaison between mine planning, coal processing and marketing in a life of mine (LOM) plan
A flowsheet can be developed such that the Life Of Mine (LOM) plan can be examined for various flowsheets, particularly how the fine coal should be treated. Simulation software, such as Limn: The Flowsheet Processor can be used to determine possibly the most important criteria for a mine development, i.e. what quality should be produced from a resource?
Journal Article
More than Moore
Next month, the worldwide semiconductor industry will formally acknowledge what has become increasingly obvious to everyone involved: Moore's law, the principle that has powered the information-technology revolution since the 1960s, is nearing its end.
Journal Article
Programming with STM32 : getting started with the Nucleo Board and C/C++
Get up and running programming the STM32 line of microcontrollers from STMicroelectronics using the hands-on information contained in this easy-to-follow guide. Written by an experienced electronics hobbyist and author, Programming with STM32: Getting Started with the Nucleo Board and C/C++ features start-to-finish projects that clearly demonstrate each technique. Discover how to set up a stable development toolchain, write custom programs, download your programs to the development board, and execute them. You will even learn how to work with external servos and LED displays!
Book
A fast on-chip debugging design for RISC-V processor
In order to improve the efficiency of on-chip debugging, a fast on-chip debugging design is proposed, which adopts JTAG interface and is applied in RISC-V processor. In this paper, we extend some debugging instructions, effectively reducing data entry by operating the debugging bus directly, and realize the breakpoint, pause, single step, et al., providing conveniences for the development and debugging of the software system.
Journal Article