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[...]various CMOS-based neuromorphic devices have been reported so far. The neuromorphic architecture was fabricated in a crossbar configuration on silicon and achieved significant improvements of area density, oscillation frequency, variability and reliability, compared to existing digital convolutional filters. The result of detailed numerical analysis based on digital logic demonstrations showed that superconducting electronics is suitable for fast and efficient neuromorphic experimental platform in the future.

Neuromorphic computing, a brain-inspired non-Von Neumann computing system, addresses the challenges posed by the Moore’s law memory wall phenomenon. It has the capability to enhance performance while maintaining power efficiency. Neuromorphic chip architecture requirements vary depending on the application and optimising it for large-scale applications remains a challenge. Neuromorphic chips are programmed using spiking neural networks which provide them with important properties such as parallelism, asynchronism, and on-device learning. Widely used spiking neuron models include the Hodgkin–Huxley Model, Izhikevich model, integrate-and-fire model, and spike response model. Hardware implementation platforms of the chip follow three approaches: analogue, digital, or a combination of both. Each platform can be implemented using various memory topologies which interconnect with the learning mechanism. Current neuromorphic computing systems typically use the unsupervised learning spike timing-dependent plasticity algorithms. However, algorithms such as voltage-dependent synaptic plasticity have the potential to enhance performance. This review summarises the potential neuromorphic chip architecture specifications and highlights which applications they are suitable for.

Highlights The review emphasizes the switching mechanisms of organic neuromorphic materials. In addition to these switching mechanisms, the capabilities of organic neuromorphic materials in tunable, conformable, and low-power applications, e.g., neuromorphic computing, neuroscience, and neuromorphic bioelectronics, are investigated. This review article offers a comprehensive examination of the capabilities of organic neuromorphic material-based devices to incorporate artificial intelligence into everyday activities. Neuromorphic computing has the potential to overcome limitations of traditional silicon technology in machine learning tasks. Recent advancements in large crossbar arrays and silicon-based asynchronous spiking neural networks have led to promising neuromorphic systems. However, developing compact parallel computing technology for integrating artificial neural networks into traditional hardware remains a challenge. Organic computational materials offer affordable, biocompatible neuromorphic devices with exceptional adjustability and energy-efficient switching. Here, the review investigates the advancements made in the development of organic neuromorphic devices. This review explores resistive switching mechanisms such as interface-regulated filament growth, molecular-electronic dynamics, nanowire-confined filament growth, and vacancy-assisted ion migration, while proposing methodologies to enhance state retention and conductance adjustment. The survey examines the challenges faced in implementing low-power neuromorphic computing, e.g., reducing device size and improving switching time. The review analyses the potential of these materials in adjustable, flexible, and low-power consumption applications, viz. biohybrid spiking circuits interacting with biological systems, systems that respond to specific events, robotics, intelligent agents, neuromorphic computing, neuromorphic bioelectronics, neuroscience, and other applications, and prospects of this technology.

The increasing power consumption in the existing computation architecture presents grand challenges for the performance and reliability of very‐large‐scale integrated circuits. Inspired by the characteristics of the human brain for processing complicated tasks with low power, neuromorphic computing is intensively investigated for decreasing power consumption and enriching computation functions. Hardware implementation of neuromorphic computing with emerging devices substantially reduces power consumption down to a few mW cm−2, compared with the central processing unit based on conventional Si complementary metal–oxide semiconductor (CMOS) technologies (50–100 W cm−2). Herein, a brief introduction on the characteristics of neuromorphic computing is provided. Then, emerging devices for low‐power neuromorphic computing are overviewed, e.g., resistive random access memory with low power consumption (< pJ) per synaptic event. A few computation models for artificial neural networks (NNs), including spiking neural network (SNN) and deep neural network (DNN), which boost power efficiency by simplifying the computing procedure and minimizing memory access are discussed. A few examples for system‐level demonstration are described, such as mixed synchronous–asynchronous and reconfigurable convolution neuron network (CNN)–recurrent NN (RNN) for low‐power computing. Neuromorphic computing is intensively investigated for decreasing power consumption and enriching computation functions. A brief introduction on the characteristics of neuromorphic computing and an overview on emerging devices for low‐power neuromorphic computing are provided, and a few computation models for artificial neural networks and a few examples for system‐level demonstration are discussed and described.

In the growing area of neuromorphic and in-memory computing, there are multiple reviews available. Most of them cover a broad range of topics, which naturally comes at the cost of details in specific areas. Here, we address the specific area of multi-level resistive switching in hafnium-oxide-based devices for neuromorphic applications and summarize the progress of the most recent years. While the general approach of resistive switching based on hafnium oxide thin films has been very busy over the last decade or so, the development of hafnium oxide with a continuous range of programmable states per device is still at a very early stage and demonstrations are mostly at the level of individual devices with limited data provided. On the other hand, it is positive that there are a few demonstrations of full network implementations. We summarize the general status of the field, point out open questions, and provide recommendations for future work.

Highlights Wafer-scale integration of Ag 2 S-based memristive crossbar arrays was demonstrated using complementary metal–oxide–semiconductor (CMOS) compatible processes below 160 °C. A record-low threshold voltage for filament formation and an ultra-low switching-energy reaching that of biological synapses in wafer-scale CMOS-compatible memristive units were achieved. The energy-efficient resistance switching was enabled by self-supply of mobile Ag + ions in Ag 2 S electrolytes and low silver-nucleation barrier at Ag/Ag 2 S interface. Memristive crossbar arrays (MCAs) offer parallel data storage and processing for energy-efficient neuromorphic computing. However, most wafer-scale MCAs that are compatible with complementary metal-oxide-semiconductor (CMOS) technology still suffer from substantially larger energy consumption than biological synapses, due to the slow kinetics of forming conductive paths inside the memristive units. Here we report wafer-scale Ag 2 S-based MCAs realized using CMOS-compatible processes at temperatures below 160 °C. Ag 2 S electrolytes supply highly mobile Ag + ions, and provide the Ag/Ag 2 S interface with low silver nucleation barrier to form silver filaments at low energy costs. By further enhancing Ag + migration in Ag 2 S electrolytes via microstructure modulation, the integrated memristors exhibit a record low threshold of approximately − 0.1 V, and demonstrate ultra-low switching-energies reaching femtojoule values as observed in biological synapses. The low-temperature process also enables MCA integration on polyimide substrates for applications in flexible electronics. Moreover, the intrinsic nonidealities of the memristive units for deep learning can be compensated by employing an advanced training algorithm. An impressive accuracy of 92.6% in image recognition simulations is demonstrated with the MCAs after the compensation. The demonstrated MCAs provide a promising device option for neuromorphic computing with ultra-high energy-efficiency.

This study proposed a biocompatible polymeric organic material-based synaptic transistor gated with a biopolymer electrolyte. A polyvinyl alcohol (PVA):chitosan (CS) biopolymer blended electrolyte with high ionic conductivity was used as an electrical double layer (EDL). It served as a gate insulator with a key function as an artificial synaptic transistor. The frequency-dependent capacitance characteristics of PVA:CS-based biopolymer EDL were evaluated using an EDL capacitor (Al/PVA: CS blended electrolyte-based EDL/Pt configuration). Consequently, the PVA:CS blended electrolyte behaved as an EDL owing to high capacitance (1.53 µF/cm2) at 100 Hz and internal mobile protonic ions. Electronic synaptic transistors fabricated using the PVA:CS blended electrolyte-based EDL membrane demonstrated basic artificial synaptic behaviors such as excitatory post-synaptic current modulation, paired-pulse facilitation, and dynamic signal-filtering functions by pre-synaptic spikes. In addition, the spike-timing-dependent plasticity was evaluated using synaptic spikes. The synaptic weight modulation was stable during repetitive spike cycles for potentiation and depression. Pattern recognition was conducted through a learning simulation for artificial neural networks (ANNs) using Modified National Institute of Standards and Technology datasheets to examine the neuromorphic computing system capability (high recognition rate of 92%). Therefore, the proposed synaptic transistor is suitable for ANNs and shows potential for biological and eco-friendly neuromorphic systems.

Artificial neural networks (ANNs), inspired by the human brain's network of neurons and synapses, enable computing machines and systems to execute cognitive tasks, thus embodying artificial intelligence (AI). Since the performance of ANNs generally improves with the expansion of the network size, and also most of the computation time is spent for matrix operations, AI computation have been performed not only using the general-purpose central processing unit (CPU) but also architectures that facilitate parallel computation, such as graphic processing units (GPUs) and custom-designed application-specific integrated circuits (ASICs). Nevertheless, the substantial energy consumption stemming from frequent data transfers between processing units and memory has remained a persistent challenge. In response, a novel approach has emerged: an in-memory computing architecture harnessing analog memory elements. This innovation promises a notable advancement in energy efficiency. The core of this analog AI hardware accelerator lies in expansive arrays of non-volatile memory devices, known as resistive processing units (RPUs). These RPUs facilitate massively parallel matrix operations, leading to significant enhancements in both performance and energy efficiency. Electrochemical random-access memory (ECRAM), leveraging ion dynamics in secondary-ion battery materials, has emerged as a promising candidate for RPUs. ECRAM achieves over 1000 memory states through precise ion movement control, prompting early-stage research into material stacks such as mobile ion species and electrolyte materials. Crucially, the analog states in ECRAMs update symmetrically with pulse number (or voltage polarity), contributing to high network performance. Recent strides in device engineering in planar and three-dimensional structures and the understanding of ECRAM operation physics have marked significant progress in a short research period. This paper aims to review ECRAM material advancements through literature surveys, offering a systematic discussion on engineering assessments for ion control and a physical understanding of array-level demonstrations. Finally, the review outlines future directions for improvements, co-optimization, and multidisciplinary collaboration in circuits, algorithms, and applications to develop energy-efficient, next-generation AI hardware systems.

In the past decade, there has been tremendous progress in integrating chalcogenide phase-change materials (PCMs) on the silicon photonic platform for non-volatile memory to neuromorphic in-memory computing applications. In particular, these non von Neumann computational elements and systems benefit from mass manufacturing of silicon photonic integrated circuits (PICs) on 8-inch wafers using a 130 nm complementary metal-oxide semiconductor line. Chip manufacturing based on deep-ultraviolet lithography and electron-beam lithography enables rapid prototyping of PICs, which can be integrated with high-quality PCMs based on the wafer-scale sputtering technique as a back-end-of-line process. In this article, we present an overview of recent advances in waveguide integrated PCM memory cells, functional devices, and neuromorphic systems, with an emphasis on fabrication and integration processes to attain state-of-the-art device performance. After a short overview of PCM based photonic devices, we discuss the materials properties of the functional layer as well as the progress on the light guiding layer, namely, the silicon and germanium waveguide platforms. Next, we discuss the cleanroom fabrication flow of waveguide devices integrated with thin films and nanowires, silicon waveguides and plasmonic microheaters for the electrothermal switching of PCMs and mixed-mode operation. Finally, the fabrication of photonic and photonic–electronic neuromorphic computing systems is reviewed. These systems consist of arrays of PCM memory elements for associative learning, matrix-vector multiplication, and pattern recognition. With large-scale integration, the neuromorphicphotonic computing paradigm holds the promise to outperform digital electronic accelerators by taking the advantages of ultra-high bandwidth, high speed, and energy-efficient operation in running machine learning algorithms. The fabrication of photonic integrated devices based on phase-change materials (PCMs) is introduced, including electron beam lithography, reactive ion etching, ion implantation and magnetron sputtering. The working principles, fabrication flows, and device performances are elaborated for the suspended waveguide platforms, photonic memory elements, waveguide microheaters and plasmonic nanogap devices. The interconnection of high-performance memory cells and their applications are discussed, including associative learning and matrix-vector multiplication. The opportunities and challenges are envisioned in developing a back-end-of-line technology compatible with the silicon photonic CMOS line for integrating PCM memory.

In recent, neuromorphic computing has been proposed to simulate the human brain system to overcome bottlenecks of the von Neumann architecture. Memristors, considered emerging memory devices, can be used to simulate synapses and neurons, which are the key components of neuromorphic computing systems. To observe the resistive switching (RS) behavior microscopically and probe the local conductive filaments (CFs) of the memristors, conductive atomic force microscopy (CAFM) with the ultra-high resolution has been investigated, which could be helpful to understand the dynamic processes of synaptic plasticity and the firing of neurons. This review presents the basic working principle of CAFM and discusses the observation methods using CAFM. Based on this, CAFM reveals the internal mechanism of memristors, which is used to observe the switching behavior of memristors. We then summarize the synaptic and neuronal functions assisted by CAFM for neuromorphic computing. Finally, we provide insights into discussing the challenges of CAFM used in the neuromorphic computing system, benefiting the expansion of CAFM in studying neuromorphic computing-based devices.