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The electronics manufacturing industry has undergone a transition towards lead-free processes and miniaturization; these changes require advancements in assembly techniques. Recent studies have identified that solder paste misalignment leads to larger component shifting, particularly observed with small passive components, resulting in more frequent quality rejections based on Institute of Printed Circuits standards. To address these challenges, various placement methods have been introduced. Among these, the AI-based mounter optimization module emerges as a leading approach, leveraging advanced machine learning methods to optimize component placement. However, it requires a substantial design of experiments and intentionally applies solder paste and chip placement offsets, which can lead to lower assembly quality, increased rework, or higher scrap rates. This paper proposes a placement method that collects real-time data from all inspection machines and positions a component considering the displacement occurring during the reflow process to reduce component misalignment after soldering. The proposed method utilizes a statistical approach by estimating the upper and lower confidence intervals for the average self-alignment degree and updates the chip placing location without requiring the design of experiments. The purpose of this study is to develop a placement method that enhances assembly quality, such as side overhang and end overlap, under solder paste misalignment. The proposed method is compared with the industry-standard placement method to demonstrate its effectiveness in improving assembly quality.

Offers an overview of state of the art passive macromodeling techniques with an emphasis on black-box approaches This book offers coverage of developments in linear macromodeling, with a focus on effective, proven methods. After starting with a definition of the fundamental properties that must characterize models of physical systems, the authors discuss several prominent passive macromodeling algorithms for lumped and distributed systems and compare them under accuracy, efficiency, and robustness standpoints. The book includes chapters with standard background material (such as linear time-invariant circuits and systems, basic discretization of field equations, state-space systems), as well as appendices collecting basic facts from linear algebra, optimization templates, and signals and transforms. The text also covers more technical and advanced topics, intended for the specialist, which may be skipped at first reading. * Provides coverage of black-box passive macromodeling, an approach developed by the authors * Elaborates on main concepts and results in a mathematically precise way using easy-to-understand language * Illustrates macromodeling concepts through dedicated examples * Includes a comprehensive set of end-of-chapter problems and exercises Passive Macromodeling: Theory and Applications serves as a reference for senior or graduate level courses in electrical engineering programs, and to engineers in the fields of numerical modeling, simulation, design, and optimization of electrical/electronic systems. Stefano Grivet-Talocia, PhD, is an Associate Professor of Circuit Theory at the Politecnico di Torino in Turin, Italy, and President of IdemWorks. Dr. Grivet-Talocia is author of over 150 technical papers published in international journals and conference proceedings. He invented several algorithms in the area of passive macromodeling, making them available through IdemWorks. Bjørn Gustavsen, PhD, is a Chief Research Scientist in Energy Systems at SINTEF Energy Research in Trondheim, Norway. More than ten years ago, Dr. Gustavsen developed the original version of the vector fitting method with Prof. Semlyen at the University of Toronto. The vector fitting method is one of the most widespread approaches for model extraction. Dr. Gustavsen is also an IEEE fellow.

This paper introduces a novel circuit design for a memcapacitance emulator, employing a single Voltage Differencing Current Conveyor (VDCC) as its core element. The emulator circuit has been intricately designed, employing only capacitors as grounded passive components. One remarkable aspect of these circuits is their inherent electronic tunability, allowing for precise control of the achieved inverse memcapacitance. The theoretical analysis of the emulator includes a comprehensive examination of potential non-idealities and parasitic influences. Careful selection of passive circuit elements has been made to minimize the impact of these undesirable effects. In contrast to extant designs cataloged in the existing literature, the presented circuitry manifests remarkable simplicity in its configuration. Furthermore, it exhibits a wide operational frequency range, extending up to 50MHz, and effectively clears the non-volatility criterion. To substantiate the efficacy of the devised circuits, comprehensive LTSpice simulations have been conducted, employing a 0.18 μm TSMC process parameter and a power supply of ±0.9 V. These simulations provide robust evidence of the emulator’s performance, reaffirming the feasibility and practicality of the proposed approach in the domain of memcapacitance emulation.

This paper aims to propose a novel placing method, i.e., place-between-paste-and-pad (PB), for mini-scale passive components to enhance electronic assembly lines’ yield. PB means a component is designed to be placed at the midpoint between the pastes and pads on the length direction while it aligns with the pads’ center on the width direction. An experiment that involves 12 printed circuit boards (PCB) and 4500 resistors R0402M (0.40 mm × 0.20 mm) is designed and conducted to get comparative results of PB and two industrial placing methods, i.e., place-on-pad and place-on-paste. Based on this experiment’s results, PB outperforms the other two methods in terms of minimizing the components’ final misalignment. Furthermore, PB is a low-cost placing strategy because PB does not need the real-time communication between the solder paste inspection machine and the pick-and-place machine. The placement method proposed in this study is expected to offer a low-cost exploration in the pick-and-place procedure to enhance the surface mount assembly quality of mini-scale passive components.

In this paper, package integration of glass–based passive components for 5G new radio (NR) millimeter–wave (mm wave) bands and an analysis of their system performance are presented. Passive components such as diplexers and couplers covering 5G NR mm wave bands n257, n258 and n260 are modeled, designed, fabricated and characterized individually along with their integrated versions. Non–contiguous diplexers are designed using three different types of filters, hairpin, interdigital and edge–coupled, and combined with a broadband coupler to emulate a power detection and control circuitry block in an RF transmitter chain. A panel–compatible semi–additive patterning (SAP) process is utilized to form high–precision redistribution layers (RDLs) on laminated glass substrate, onto which fine features with tight tolerance are added to fabricate these structures. The diplexers exhibit low insertion loss, low VSWR and high isolation, and have a small footprint. A system performance analysis using a co–simulation technique is presented for the first time to quantify the distortion in amplitude and phase produced by the fabricated passive component block in terms of error vector magnitude (EVM). Moreover, the scalability of this approach to compare similar passive components based on their specifications and signatures using a system–level performance metric such as EVM is discussed.

An advanced Neuro-space mapping (Neuro-SM) multiphysics parametric modeling approach for microwave passive components is proposed in this paper. The electromagnetic (EM) domain model, which represents the EM responses with respect to geometrical parameters, is regarded as a coarse model. The multiphysics domain model, which represents the multiphysics responses with respect to both geometrical parameters and multiphysics parameters, is regarded as a fine model. The proposed model is constructed by the input mapping, the output mapping and the coarse model. The input mapping is used to map multiphysics parameters to EM parameters. The output mapping is introduced to further narrow the gap between the output of the coarse model and the multiphysics data. In addition, a three-stage training method is proposed for efficiently developing the proposed multiphysics model. The proposed technique, which combines the efficiency of EM analysis and the accuracy of multiphysics analysis, can achieve better accuracy with less multiphysics data than existing modeling methods. The developed Neuro-SM multiphysics model provides accurate and fast predictions of multiphysics responses. Therefore, the design cycle of microwave passive components is shortened while the modeling cost is significantly reduced. Two microwave filter examples are utilized to demonstrate the accuracy of the proposed parametric modeling technique.

During the reflow process in surface mount technology (SMT), a passive component misplaced on a pad would be self-aligned or tombstoned due to a restoring force which is driven by surface tension of molten solder. In this study, the influence of pad design on assembly defect rate was experimentally and analytically investigated using computational fluid dynamics (CFD) simulation. The assembly defect rate of the SMT was experimentally derived from the design of experiments (DOE) considering the pad design and the misplacement of the passive component. The restoring force and moment acting on the chip resistor were calculated using CFD simulation considering the fluidic forces of the molten lead-free solder paste during the reflow process according to the amount of the misplacement and the pad design parameters.

Bioresorbable electronic devices and/or systems are of great appeal in the field of biomedical engineering due to their unique characteristics that can be dissolved and resorbed after a predefined period, thus eliminating the costs and risks associated with the secondary surgery for retrieval. Among them, passive electronic components or systems are attractive for the clear structure design, simple fabrication process, and ease of data extraction. This work reviews the recent progress on bioresorbable passive electronic devices and systems, with an emphasis on their applications in biomedical engineering. Materials strategies, device architectures, integration approaches, and applications of bioresorbable passive devices are discussed. Furthermore, this work also overviews wireless passive systems fabricated with the combination of various passive components for vital sign monitoring, drug delivering, and nerve regeneration. Finally, we conclude with some perspectives on future fundamental studies, application opportunities, and remaining challenges of bioresorbable passive electronics.

With the proliferation of ultrahigh-speed mobile networks and internet-connected devices, along with the rise of artificial intelligence (AI) 1 , the world is generating exponentially increasing amounts of data that need to be processed in a fast and efficient way. Highly parallelized, fast and scalable hardware is therefore becoming progressively more important 2 . Here we demonstrate a computationally specific integrated photonic hardware accelerator (tensor core) that is capable of operating at speeds of trillions of multiply-accumulate operations per second (10 12 MAC operations per second or tera-MACs per second). The tensor core can be considered as the optical analogue of an application-specific integrated circuit (ASIC). It achieves parallelized photonic in-memory computing using phase-change-material memory arrays and photonic chip-based optical frequency combs (soliton microcombs 3 ). The computation is reduced to measuring the optical transmission of reconfigurable and non-resonant passive components and can operate at a bandwidth exceeding 14 gigahertz, limited only by the speed of the modulators and photodetectors. Given recent advances in hybrid integration of soliton microcombs at microwave line rates 3 – 5 , ultralow-loss silicon nitride waveguides 6 , 7 , and high-speed on-chip detectors and modulators, our approach provides a path towards full complementary metal–oxide–semiconductor (CMOS) wafer-scale integration of the photonic tensor core. Although we focus on convolutional processing, more generally our results indicate the potential of integrated photonics for parallel, fast, and efficient computational hardware in data-heavy AI applications such as autonomous driving, live video processing, and next-generation cloud computing services. An integrated photonic processor, based on phase-change-material memory arrays and chip-based optical frequency combs, which can operate at speeds of trillions of multiply-accumulate (MAC) operations per second, is demonstrated.

This study presents a novel high-input impedance voltage-mode differential difference current conveyor transconductance amplifier (DDCCTA)-based universal filter with a single input and five outputs. The proposed configuration uses two DDCCTAs, two grounded capacitors and two grounded resistors. It simultaneously provides voltage-mode lowpass, bandpass, highpass, bandstop and allpass filtering responses, without passive component-matching conditions or restrictions on input signals. The proposed circuit offers high-input impedance and low active and passive sensitivities, and uses only grounded capacitors and resistors.