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The challenges faced in an isolated wind energy conversion system (WECS) are larger transient times, high steady-state error, and larger harmonic content. To overcome these issues, an adaptive voltage controller (AVC) along with the load current observer (LCO) could be the better proposition. However, the AVC and LCO, in conjunction with the conventional space vector pulse width modulation (SVPWM) technique to operate the three-phase inverter of WECS, would not be able to further improve these parameters. This paper proposes the use of the unified voltage SVPWM (UVSVPWM) technique along with the AVC and LCO, which could improve the transient behavior by about 30% as well as reduce the harmonic content of the load voltage and current by about 70% and 2%, respectively. This paper considers an isolated WECS connected to the linear load, which is operated under balanced as well as unbalanced load conditions. The proposed control technique is verified for both the balanced and unbalanced cases using MATLAB/Simulink.

Multiphase drives have received a lot of interest because of their several features over traditional three-phase systems for high-power applications. Pulse-width modulation (PWM) approaches are necessary to regulate the supply for multiphase ac drives. As a result, it is vital to continually improve the modulation and control approaches used to upgrade output power converters’ quality. This paper offers a comparative analysis of the 2L + 2M and 6L space vector pulse-width modulation (SVPWM) techniques applied to a five-phase two-level voltage source inverter (VSI) fed an inductive (R-L) load. The comparative evaluation is based on measuring the inverter switching losses, the total harmonic distortion (THD) values, and the common mode voltage (CMV) under different operation scenarios. A system model is carried out by MATLAB/Simulink. An experimental prototype is constructed in the lab to validate the theoretical analysis. Simulation results for the system based on the two SVPWM techniques are obtained at different modulation indices and different output frequencies and are confirmed by the experimental results. It has been found that the peak-to-peak CMV of the 6L method is 80% lower than that of the 2L + 2M method. Moreover, 6L SVPWM offers better DC-link utilization compared to 2L + 2M SVPWM.

The dynamic characteristics of high-speed on/off valves (HSVs) are a key factor in measuring their performance, and determining the control accuracy of valve-controlled systems. Furthermore, the hysteresis characteristics of HSVs can seriously affect their dynamic characteristics. This study evaluated the hysteresis characteristics of HSVs in a valve-controlled hydraulic control system, and considered the pressure changes in front of the valve during the opening and closing process of the valve core. A time-delay compensation control (TDCC) based on pulse-width modulation (PWM) was proposed. The reference PWM signal was used to control the opening and closing time of the HSV, while the loading signal was composed of an opening compensation PWM, an excitation PWM, an opening holding PWM, and a closing compensation PWM. Using an opening compensation PWM to start the initial current, combined with current feedback and pressure changes in front of the valve, the amplitude and duty cycle of different PWM signals were determined in real time. This reduced the time delay and working current of the HSV during opening and closing. A simulation comparison analysis was conducted, with a single PWM control and a pre-excitation control algorithm (PECA). The results showed that, compared to a single PWM control, the TDCC can reduce the overall opening and closing time delay by 78.1%, and the energy consumption by 64.7%. Compared with PECA, the overall opening and closing time delay was reduced by 10.9%, and the energy consumption was reduced by 28%. At the same time, the frequency response of the valve core displacement increased by 70%, compared to the single PWM control.

The combination of five-level converters with selective harmonic elimination pulse-width modulation (SHEPWM) is a practical need in medium-voltage, high-power applications. However, how to suppress the common-mode voltage (CMV) in this case becomes a difficult problem. Although CMV suppression under high switching frequency (SF) modulations and three-level SHEPWM has been discussed in many studies, these methods are not applicable to five-level SHEPWM. This is partly because the zero-sequence voltage under SHEPWM is difficult to adjust and partly because the solution spaces of three- and five-level SHEPWM are completely different. Moreover, conventional CMV suppression in three-level SHEPWM must sacrifice the switching angles to control the zero-sequence voltage, which makes the equivalent SF increase. Therefore, in this article, we propose a novel CMV suppression method that effectively utilizes the multimode characteristics of five-level SHEPWM. Multimode characteristics refers to the output waveform containing different levels of jump patterns. Therefore, there are a large number of switching angle trajectories in five-level SHEPWM, which outputs the same fundamental voltage with different CMVs. The proposed method uses the special multimode characteristics to reduce the CMV without sacrificing the switching angles. Its effectiveness and feasibility are verified by experiments.

Inverter-based systems encounter significant challenges in mitigating common-mode voltage (CMV) and minimizing inverter losses. Despite various space vector pulse-width modulation (SVPWM) techniques proposed to address these issues, a comprehensive comparative analysis has been lacking. This paper addresses this gap through an experimental and simulation-based evaluation of nine SVPWM techniques. A new discontinuous SVPWM technique, DSVPWM-K4, is introduced, which involves reversing the use of the two zero vectors in DSVPWM-K3. DSVPWM-K3 delivers superior performance in terms of CMV reduction, total harmonic distortion (THD), and inverter losses across all modulation indices (MI = 1, 0.75, 0.5, and 0.25), making it the most effective overall. Although DSVPWM-K4 is a novel approach, it ranks second in effectiveness. The RSPWM technique achieves the lowest CMV with a zero peak-to-peak value but is most effective at lower modulation indices (0.25 and 0.5) due to higher harmonic distortion at higher modulation indices. AZSPWM performs optimally at higher modulation indices, providing a 66.66% reduction in CMV compared to continuous SVPWM and significantly lower THD compared to RSPWM. In contrast, NSPWM exhibits nearly double the THD compared to continuous SVPWM.

Double modulation wave carrier-based pulse width modulation (CBPWM) is a solution for eliminating the deviations of the neutral-point voltage (NPV) in three-level neutral-point clamped inverters. In this paper, a new hybrid CBPWM strategy is proposed that not only eliminates the neutral-point voltage oscillations but also reduces the common-mode voltage (CMV) by half. Furthermore, the harmonic content is also reduced compared with the available reduced CMV modulation by adjusting the modulation waves based on the location of the reference vector in the space vector diagram. An active neutral-point voltage controller is also realized in order to maintain the performance of the modulation strategy under the NPV perturbations. The performance of the proposed algorithm is compared to the available CBPWM-based techniques in the literature. The effectiveness of the proposed method is also verified by experimental results.

High vibration noise limits the application of permanent magnet motors in electric locomotive traction. This paper focuses on the high-frequency electromagnetic vibration in traction permanent magnet motors introduced by inverters. It explores the impact of periodic and random switching frequency pulse-width modulation (PWM) schemes on the high-frequency electromagnetic vibration performance of permanent magnet motors. The studied works are as follows: (1) The sources of higher-order harmonic components in the stator current are analyzed, and the characteristics of electromagnetic forces generated by these higher-order harmonic currents are studied. (2) The principles for suppressing high-frequency electromagnetic vibrations through random PWM are introduced. (3) The impact of the random switching frequency on higher-order harmonic currents in permanent magnet motors is analyzed through simulations. (4) The comprehensive experimental validation and evaluation of the random PWM technique are conducted on a permanent magnet motor. The results show that the vibration near the carrier frequency can be effectively weakened, but the overall vibration level has not been effectively reduced.

The aim of this paper is to present our research into the reduction of vibrations in induction motors. The use of power inverters results in the generation of electrical harmonics, which increase the level of the mechanical vibrations of electrical machines. To reduce these harmonics, we present a discontinuous pulse-width modulation (PWM) control strategy based on carrier-wave modulation applied to multilevel inverters. Using the proposed modulation technique, the amplitude of the electrical harmonics is reduced, as compared to other conventional techniques. These current harmonics produce the MMF (magnetomotive force) harmonics in the air gap, which are one of the main sources of vibrations. The control strategy makes it possible to vary the electrical spectrum at the output of a multilevel inverter by modifying a control parameter of the carrier wave in the PWM, thus avoiding the natural frequencies of mechanical resonance. The proposed technique also has the feature of attenuating the total harmonics distortion of the voltage of the multilevel inverters, as well as the achievement of a higher RMS value of the output voltage for the same DC level. Laboratory results for an induction motor with different modulation strategies, applied in a multilevel inverter and compared to the strategy presented, are attached.

In contrast to the conventional topology, wherein the Device Under Test (DUT) controller and the electric motor emulator (EME) are powered by the DC (Direct Current) voltage source independently, the common DC bus topology necessitates a single power supply. This reduces the cost and complexity of the motor emulator system, making it more favorable for large-scale industrial applications. However, this topology introduces significant circulating current issues in the system. A common DC bus circulating current suppression method is proposed in this paper for the motor emulator. First, the mechanism of zero-sequence circulating current generation in the common DC bus topology is analyzed and the expression for the system’s zero-sequence voltage difference is derived. Then, a control method based on a Hybrid PWM (Pulse Width Modulation) strategy that unifies SPWM (SIN Pulse Width Modulation) and SVPWM (Space Vector Pulse Width Modulation) is proposed, which has been shown to be effective in suppressing the zero-sequence circulating current in a motor emulator system with a common DC bus topology. The proposed control method has been experimentally validated using a motor emulator system.

For the existing outphasing architectures of an all-digital transmitter (ADTx), the required sampling rate of the signal is too high, which increases the difficulty of digital radio frequency pulse width modulation (RF-PWM) processing. In this paper, we present an outphasing architecture based on the parallel RF-PWM method for an ADTx. Through polyphase interpolation, two baseband outphasing signals are divided into multiple low-rate signals to process simultaneously. The parallel outphasing signals are modulated and encoded to obtain 1-bit parallel signals, which are, respectively, transmitted to multigigabit transceivers (MGTs) to generate two two-level high-speed pulses with different phases. Finally, a three-level high-speed pulse is synthesized and amplified through the switching power amplifier. Through this parallel scheme, the sampling rate of digital RF-PWM signal processing is effectively reduced. Moreover, to explore a pulse encoding method, the outphasing architecture is combined with a zero-crossing comparison through an angle calculation and quadrant judgment, which simplifies the modulation and encoding process. In addition, the impact of the sub-filter order and the number of parallel paths on system performance is analyzed. The simulation results show that for a 16QAM signal with a baseband bandwidth of 20 MHz and a carrier frequency of 200 MHz, the adjacent channel power ratio (ACPR) is below −45 dBc and the error vector magnitude (EVM) is below 1% in the proposed scheme.