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result(s) for
"Random number generator"
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Raw QPP-RNG randomness via system jitter across platforms: a NIST SP 800-90B evaluation
2025
High-quality randomness is fundamental to the security of modern cryptographic systems. We present
QPP-RNG
, a true random number generator (TRNG) that harvests entropy from diverse system-level jitters–including CPU pipeline timing divergences, DRAM refresh cycle perturbations, cache miss-driven memory access latencies, and other subtle hardware and operating system-induced fluctuations. QPP-RNG’s core mechanism measures the elapsed time of randomized array sorting operations–where each Fisher-Yates shuffle is infinitesimally perturbed by these microscopic jitters–and amplifies these timing variations into cryptographically strong randomness through a quantum permutation pad (QPP) architecture, all achievable on commodity hardware. The raw output of QPP-RNG underwent rigorous evaluation for independent and identically distributed (IID) behavior using the NIST SP 800-90B IID test suite, alongside the comprehensive NIST SP 800-22 and ENT statistical test batteries. Across a range of platforms, including Windows, macOS, and Raspberry Pi, QPP-RNG consistently achieved high IID min-entropy between
and
bits/byte. It passed all NIST SP 800-90B IID tests with
-values significantly above the
threshold, confirming that its generated randomness is statistically indistinguishable from ideal IID sources derived directly from system jitter. Cross-platform analyses spanning x86_64 and ARM64 architectures further demonstrate that the extracted jitter fingerprint–and consequently the generated randomness–exhibits remarkable statistical consistency, irrespective of the underlying hardware or operating system. QPP-RNG’s entropy density compares favorably with leading commercial entropy sources. It matches or slightly exceeds the NIST IID-certified min-entropy of ID Quantique’s Quantis QRNG (7.8744 bits/byte), and significantly outperforms both Red Hat’s CPU Time Jitter RNG (7.4528 bits/byte) and Quside’s PCIe One quantum entropy source (6.5136 bits/byte). Even against specialized hardware RNGs like Microchip’s ECC608 (4.0568 bits/byte), QPP-RNG demonstrates superior performance using only general-purpose processors. By effectively transforming otherwise discarded system noise into a reliable and high-quality entropy stream, QPP-RNG establishes a novel paradigm for embedded security, providing a robust entropy source on general-purpose devices without specialized hardware. This makes it especially well-suited for resource-constrained Internet of Things (IoT) and edge computing applications where strong entropy sources are paramount.
Journal Article
From Random Numbers to Random Objects
2022
Many security-related scenarios including cryptography depend on the random generation of passwords, permutations, Latin squares, CAPTCHAs and other types of non-numerical entities. Random generation of each entity type is a different problem with different solutions. This study is an attempt at a unified solution for all of the mentioned problems. This paper is the first of its kind to pose, formulate, analyze and solve the problem of random object generation as the general problem of generating random non-numerical entities. We examine solving the problem via connecting it to the well-studied random number generation problem. To this end, we highlight the challenges and propose solutions for each of them. We explain our method using a case study; random Latin square generation.
Journal Article
FPGA implementation of a coprocessor architecture for random data generation and encryption
by
Kumar, Manoj
2026
Coprocessors are designed to perform some specific tasks to enhance system performance and speed. Information security is the main focus in internet of thing (IoT), cryptography, and cybersecurity applications. In this work, a coprocessor architecture is designed to generate 4-bits of random data and perform encryption. Coprocessor architecture uses true random number generator (TRNG) and pseudo-random number generator (PRNG) architectures to generate random data. Modified linear feedback shift register (LFSR)-based PRNG and modified transition effect ring oscillator (TERO) and ring oscillator-based TRNG architectures are designed and implemented for performing encryption. A serial-in-parallel-out (SIPO) shift register circuit is used to generate 4-bit random data. A 15-bit instruction word is assigned to coprocessor architecture to perform its task. The coprocessor architecture is designed using VHSIC Hardware Description Language (VHDL) and implemented on an Artix-7 field programmable gate array (FPGA). All simulation and synthesis results of the proposed coprocessor architecture are obtained by the Xilinx Vivado 2015.2 tool. Coprocessor architecture efficiency (throughput (Mbps)/LUTs) is 2.31, and it operates at a 100 MHz clock.
Journal Article
Generating randomness: making the most out of disordering a false order into a real one
2019
Randomness is far from a disturbing disorder in nature. Rather, it underlies many processes and functions. Randomness can be used to improve the efficacy of development and of systems under certain conditions. Moreover, valid unpredictable random-number generators are needed for secure communication, rendering predictable pseudorandom strings unsuitable. This paper reviews methods of generating randomness in various fields. The potential use of these methods is also discussed. It is suggested that by disordering a “false order,” an effective disorder can be generated to improve the function of systems.
Journal Article
Review of Methodologies and Metrics for Assessing the Quality of Random Number Generators
by
Crocetti, Luca
,
Nannipieri, Pietro
,
Di Matteo, Stefano
in
Algorithms
,
Alliances
,
Best practice
2023
Random number generators are a key element for various applications, such as computer simulation, statistical sampling, and cryptography. They are used to generate/derive cryptographic keys and non-repeating values, e.g., for symmetric or public key cyphers. The strength of a data protection system against cyber attacks corresponds to the strength of the weakest point in the security chain. Therefore, from a mathematical point of view, the security chain can be compromised even if the strongest algorithm is implemented. In fact, if the system requires keys or other random values and the generation process shows a certain vulnerability, the security of the system itself can be compromised. In this article, we present the most reliable tools and methodologies and the main standardisation efforts in the field of computer security to assess the quality of random number generators and ensure that they can be applied to computer security applications by offering adequate security strength. We offer a comprehensive guide that can be used as a quick and practical reference by developers of random number generators of any type to evaluate the random bit streams generated by implemented modules and determine whether or not they can be used in cybersecurity applications. Finally, we also present some use cases to which we applied the presented approach.
Journal Article
A Post-Processing Method for Quantum Random Number Generator Based on Zero-Phase Component Analysis Whitening
2025
Quantum Random Number Generators (QRNGs) have been theoretically proven to be able to generate completely unpredictable random sequences, and have important applications in many fields. However, the practical implementation of QRNG is always susceptible to the unwanted classical noise or device imperfections, which inevitably diminishes the quality of the generated random bits. It is necessary to perform the post-processing to extract the true quantum randomness contained in raw data generated by the entropy source of QRNG. In this work, a novel post-processing method for QRNG based on Zero-phase Component Analysis (ZCA) whitening is proposed and experimentally verified through both time and spectral domain analysis, which can effectively reduce auto-correlations and flatten the spectrum of the raw data, and enhance the random number generation rate of QRNG. Furthermore, the randomness extraction is performed after ZCA whitening, after which the final random bits can pass the NIST test.
Journal Article
Low Area PRESENT Cryptography in FPGA Using TRNG-PRNG Key Generation
by
Nayyar, Anand
,
Majid Mehmood, Raja
,
Ganesh Babu, R.
in
Algorithms
,
Computer architecture
,
Cryptography
2021
Lightweight Cryptography (LWC) is widely used to provide integrity, secrecy and authentication for the sensitive applications. However, the LWC is vulnerable to various constraints such as high-power consumption, time consumption, and hardware utilization and susceptible to the malicious attackers. In order to overcome this, a lightweight block cipher namely PRESENT architecture is proposed to provide the security against malicious attacks. The True Random Number Generator-Pseudo Random Number Generator (TRNG-PRNG) based key generation is proposed to generate the unpredictable keys, being highly difficult to predict by the hackers. Moreover, the hardware utilization of PRESENT architecture is optimized using the Dual port Read Only Memory (DROM). The proposed PRESENT-TRNG-PRNG architecture supports the 64-bit input with 80-bit of key value. The performance of the PRESENT-TRNG-PRNG architecture is evaluated by means of number of slice registers, flip flops, number of slices Look Up Table (LUT), number of logical elements, slices, bonded input/output block (IOB), frequency, power and delay. The input retrieval performances analyzed in this PRESENT-TRNG-PRNG architecture are Peak Signal to Noise Ratio (PSNR), Structural Similarity Index (SSIM) and Mean-Square Error (MSE). The PRESENT-TRNG-PRNG architecture is compared with three different existing PRESENT architectures such as PRESENT On-The-Fly (PERSENT-OTF), PRESENT Self-Test Structure (PRESENT-STS) and PRESENT-Round Keys (PRESENT-RK). The operating frequency of the PRESENT-TRNG-PRNG is 612.208 MHz for Virtex 5, which is high as compared to the PRESENT-RK.
Journal Article
A High-Entropy True Random Number Generator with Keccak Conditioning for FPGA
by
Dolmeta, Alessandra
,
Piscopo, Valeria
,
Masera, Guido
in
Algorithms
,
Comparative analysis
,
Design and construction
2025
Any cryptographic system strongly relies on randomness to ensure robust encryption and masking methods. True Random Number Generators play a fundamental role in this context. The National Institute of Standards and Technology (NIST) and the Bundesamt für Sicherheit in der Informationstechnik (BSI) provide guidelines for designing reliable entropy sources to fuel cryptographic Random Bit Generators. This work presents a highly parameterized, open-source implementation of a TRNG based on ring oscillators, complemented by an optimized Keccak conditioning unit. The design process is accompanied by a thorough study of the relevant literature and standards, specifying the requirements for reliable entropy sources in cryptographic systems. The design of the TRNG proposed in this paper aims to strike a balance between area, throughput, power consumption, and entropy, while adhering to these guidelines. The proposed design has undergone extensive testing and validation and has successfully passed the NIST SP 800-22, NIST SP 800-90B, and BSI AIS-31 tests, achieving a min-entropy per bit of 0.9982 (NIST) and 0.9998 (BSI).
Journal Article
A High-Performance FPGA PRNG Based on Multiple Deep-Dynamic Transformations
2024
Pseudo-random number generators (PRNGs) are important cornerstones of many fields, such as statistical analysis and cryptography, and the need for PRNGs for information security (in fields such as blockchain, big data, and artificial intelligence) is becoming increasingly prominent, resulting in a steadily growing demand for high-speed, high-quality random number generators. To meet this demand, the multiple deep-dynamic transformation (MDDT) algorithm is innovatively developed. This algorithm is incorporated into the skewed tent map, endowing it with more complex dynamical properties. The improved one-dimensional discrete chaotic mapping method is effectively realized on a field-programmable gate array (FPGA), specifically the Xilinx xc7k325tffg900-2 model. The proposed pseudo-random number generator (PRNG) successfully passes all evaluations of the National Institute of Standards and Technology (NIST) SP800-22, diehard, and TestU01 test suites. Additional experimental results show that the PRNG, possessing high novelty performance, operates efficiently at a clock frequency of 150 MHz, achieving a maximum throughput of 14.4 Gbps. This performance not only surpasses that of most related studies but also makes it exceptionally suitable for embedded applications.
Journal Article
Development of a High Min-Entropy Quantum Random Number Generator Based on Amplified Spontaneous Emission
by
Duda, Charlotte K.
,
Meier, Kristina A.
,
Newell, Raymond T.
in
amplified spontaneous emission
,
Analysis
,
Bandwidths
2023
We present the theory, architecture, and performance characteristics of a quantum random number generator (QRNG) which operates in a PCI express form factor-compatible plug-and-play design. The QRNG relies on a thermal light source (in this case, amplified spontaneous emission), which exhibits photon bunching according to the Bose–Einstein (BE) statistics. We demonstrate that 98.7% of the unprocessed random bit stream min-entropy is traceable to the BE (quantum) signal. The classical component is then removed using a non-reuse shift-XOR protocol, and the final random numbers are generated at a 200 Mbps rate and shown to pass the statistical randomness test suites FIPS 140-2, Alphabit, SmallCrush, DIEHARD, and Rabbit of the TestU01 library.
Journal Article