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Silicon carbide (SiC)-diodes have been commercially available since 2001 and various SiC-switches have been launched recently. Parallelly, gallium nitride (GaN) is moving into power electronics and the first low-voltage devices are already on the market. Currently, it seems that GaN-transistors are ideal for high frequency ICs up to 1kV (maybe 2kV) and maximum a few 10A. SiC transistors are better suited for discrete devices or modules blocking 1kV and above and virtually no limit in the current but in that range they will face strong competition from the silicon insulated gate bipolar transistors (IGBTs). SiC and GaN Schottky-diodes would offer a similar performance, hence here it becomes apparent that material cost and quality will finally decide the commercial success of wide bandgap devices. Bulk GaN is still prohibitively expensive, whereas GaN on silicon would offer an unrivalled cost advantage. Devices made from the latter could be even cheaper than silicon devices. However, packaging is already a limiting factor for silicon devices even more so in exploiting the advantage of wide bandgap materials with respect to switching speed and high temperature operation. After all, reliability is a must for any device no matter which material it is made of.

A new generation of high-efficiency power devices is being developed using wide bandgap (WBG) semiconductors, like GaN and SiC, which are emerging as attractive alternatives to silicon. The recent interest in GaN has been piqued by its excellent material characteristics, including its high critical electric field, high saturation velocity, high electron mobility, and outstanding thermal stability. Therefore, the superior performance is represented by GaN-based high electron mobility transistor (HEMT) devices. They can perform at higher currents, voltages, temperatures, and frequencies, making them suitable devices for the next generation of high-efficiency power converter applications, including electric vehicles, phone chargers, renewable energy, and data centers. Thus, this review article will provide a basic overview of the various technological and scientific elements of the current GaN HEMTs technology. First, the present advancements in the GaN market and its primary application areas are briefly summarized. After that, the GaN is compared with other devices, and the GaN HEMT device’s operational material properties with different heterostructures are discussed. Then, the normally-off GaN HEMT technology with their different types are considered, especially on the recessed gate metal insulator semiconductor high electron mobility transistor (MISHEMT) and p-GaN. Hereafter, this review also discusses the reliability concerns of the GaN HEMT which are caused by trap effects like a drain, gate lag, and current collapse with numerous types of degradation. Eventually, the breakdown voltage of the GaN HEMT with some challenges has been studied.

This article provides a comprehensive review of wide and ultrawide bandgap power electronic semiconductor devices, comparing silicon (Si), silicon carbide (SiC), gallium nitride (GaN), and the emerging device diamond technology. Key parameters examined include bandgap, critical electric field, electron mobility, voltage/current ratings, switching frequency, and device packaging. The historical evolution of each material is traced from early research devices to current commercial offerings. Significant focus is given to SiC and GaN as they are now actively competing with Si devices in the market, enabled by their higher bandgaps. The paper details advancements in material growth, device architectures, reliability, and manufacturing that have allowed SiC and GaN adoption in electric vehicles, renewable energy, aerospace, and other applications requiring high power density, efficiency, and frequency operation. Performance enhancements over Si are quantified. However, the challenges associated with the advancements of these devices are also elaborately described: material availability, thermal management, gate drive design, electrical insulation, and electromagnetic interference. Alongside the cost reduction through improved manufacturing, material availability, thermal management, gate drive design, electrical insulation, and electromagnetic interference are critical hurdles of this technology. The review analyzes these issues and emerging solutions using advanced packaging, circuit integration, novel cooling techniques, and modeling. Overall, the manuscript provides a timely, rigorous examination of the state of the art in wide bandgap power semiconductors. It balances theoretical potential and practical limitations while assessing commercial readiness and mapping trajectories for further innovation. This article will benefit researchers and professionals advancing power electronic systems.

A new field plate (FP) is proposed for gallium nitride high‐electron‐mobility transistors (HEMTs). It features an innovative arcuate end (AE), which allows the induced charges that originally gathered at the FP end to diffuse over a wider area. Hence, not only is the electric field in the channel at the gate edge alleviated due to the induced charges, but also that concentrated at the FP end is reduced by means of AE. The simulation results indicate that by upgrading a source FP with AE, HEMT gains a 99% increase in breakdown voltage while remaining unaltered in specific on‐resistance. It also gets a 43.41% decrease in power loss during one cycle while maintaining the same breakdown voltage, which greatly contributes to enhance the efficiency of power electronic circuits. This work reports a new field plate technique for the popular device of gallium nitride high‐electron‐mobility transistors. The proposed technique solves the inherent shortcomings of the traditional field plate technology, and significantly improves the device performance and reliability.

The recent emergence of lead-halide perovskites as active layer materials for thin film semiconductor devices including solar cells, light emitting diodes, and memristors has motivated the development of several new drift-diffusion models that include the effects of both electronic and mobile ionic charge carriers. In this work we introduce Driftfusion, a versatile simulation tool built for modelling one-dimensional ordered semiconductor devices with mixed ionic-electronic conducting layers. Driftfusion enables users to model devices with multiple, distinct, material layers using up to four charge carrier species: electrons and holes plus up to two ionic species. The time-dependent carrier continuity equations are coupled to Poisson’s equation enabling transient optoelectronic device measurement protocols to be simulated. In addition to material and device-wide properties, users have direct access to adapt the physical models for carrier transport, generation and recombination. Furthermore, a discrete interlayer interface approach circumvents the requirement for boundary conditions at material interfaces and enables interface-specific properties to be introduced.

As one of the most vulnerable components to temperature and temperature cycling conditions in power electronics converter systems in these application fields as wind power, electric vehicles, drive system, etc., power semiconductor devices draw great concern in terms of reliability. Owing to the wide utilization of power semiconductor devices in various power applications, especially insulated gate bipolar transistors (IGBTs), power semiconductor devices have been studied extensively regarding increasing reliability methods. This study comparatively reviews recent advances in the area of reliability research for power semiconductor devices, including condition monitoring (CM), active thermal control (ATC), and remaining useful lifetime (RUL) estimation techniques. Different from previous review studies, this technical review is carried out with the aim of providing a comprehensive overview of the correlation between various enhancing reliability techniques and discussing the corresponding merits and demerits by using 144 related up-to-date papers. The structure and failure mechanism of power semiconductor devices are first investigated. Different failure indicators and recent associated CM techniques are then compared. The ATC approaches following the type of converter systems are further summarized. Furthermore, RUL estimation techniques are surveyed. This paper concludes with summarized challenges for future research opportunities regarding reliability improvement.

The vertical Gallium Nitride-on-Silicon (GaN-on-Si) trench metal-oxide-semiconductor field effect transistor (MOSFET) is a promising architecture for the development of efficient GaN-based power transistors on foreign substrates for power conversion applications. This work presents an overview of recent case studies, to discuss the most relevant challenges related to the development of reliable vertical GaN-on-Si trench MOSFETs. The focus lies on strategies to identify and tackle the most relevant reliability issues. First, we describe leakage and doping considerations, which must be considered to design vertical GaN-on-Si stacks with high breakdown voltage. Next, we describe gate design techniques to improve breakdown performance, through variation of dielectric composition coupled with optimization of the trench structure. Finally, we describe how to identify and compare trapping effects with the help of pulsed techniques, combined with light-assisted de-trapping analyses, in order to assess the dynamic performance of the devices.

This review summarizes research activities on two-dimensional (2D) materials-assisted epitaxy of inorganic semiconductors and their optoelectronic device applications. We presented the overall research related to the growth of epitaxial semiconductor layers on 2D van der Waals materials and discussed various methods to perform controlled growth of semiconductor nanostructures and microstructures on 2D layers. The 2D layers' benefits in semiconductor technology and their role in non-destructive micro-crystallographic analysis, integration of heterogeneous semiconductor devices, and the fabrication of detachable semiconductor devices. This is followed by an in-depth discussion on 2D materials-assisted growth and non-destructive transfer of random and regular semiconductor arrays and their applications in free-standing, flexible, individually addressable semiconductor optoelectronic devices, including micro display applications. The research covered in this review promotes novel applications of semiconductors grown on 2D materials and exploits ways to synergistically combine their functionalities.

The interface trap charges (ITC) associated reliability analysis of a charge‐plasma based asymmetric double‐gate (ADG) dopingless tunnel field effect transistor (DLTFET) with Si/Ge heterojunction and high‐κ gate dielectric (HJADGDLTFET) has been studied. The HJADGDLTFET uses silicon at the drain and the channel region, and germanium at the source region, which enhances the band‐to‐band tunnelling at the source‐channel junction, and hence drive current is increased by one order concerning ADGDLTFET. Also, ADG and high‐κ dielectric (HfO2) have been used to maintain low off‐state current values. The primary intention of this work is to investigate the impact of ITC for HJADGDLTFET and compare it for ADGDLTFET considering DC, analog/RF, and linearity parameters such as transfer characteristics, electric‐field, electric potential, first‐, second‐, and third‐order transconductances (gm1, gm2, and gm3), gate‐to‐drain capacitance (Cgd), cut‐off frequency (fT), gain–bandwidth product, device efficiency, second‐ and third‐order voltage intercept points (VIP2, VIP3), third‐order input intercept points (IIP3), and third‐order intermodulation distortion. The ATLAS simulation results show that the HJADGDLTFET is more immune to ITC variation than conventional ADGDLTFET concerning different polarities of ITC available at the semiconductor‐oxide interface.

This article discusses advanced developments and applications of chemical mechanical polishing (CMP) published recently in the selected papers indexed by Web of Science. The topics covered are advances in slurry and abrasives, pads and conditioning, CMP for semiconductor device manufacturing, CMP for other applications, modeling and simulations, and CMP with ultrasonic vibrations, lasers, photocatalysts, or UV lamps. Nonspherical abrasive particles have been developed for CMP, resulting in increased material removal rates (MRRs). Advanced conditioning methods have been proposed to uniformly generate pad surface shapes. Fixed abrasive CMP has advantages with higher MRRs. New models for designing the pad and conditioner have been proposed, and more uniform pad shapes can be obtained. Integrated advanced process control improves the wafer-to-wafer variation. Dental implants treated by CMP perform equally or better than the baseline-machined implants and the biphasic calcium phosphate-treated implants. The slurry distribution and the abrasive behavior can be simulated by means of multiphase modeling. Molecular dynamics simulations can explore the mechanism of CMP. CMP of wafers can be simulated using an atomic force microscope with its tapping mode. Theoretical models have been developed to calculate removal depths, study the chemical action in CMP, and explore the crystal orientation effects. CMP assisted by ultrasonic vibrations increases CMP MRRs and lowers the roughness of polished surfaces. CMP assisted by using UV lamp power, femtosecond lasers, or photocatalysts enhances CMP MRRs.