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31 result(s) for "Transistor-transistor logic circuits"
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Low Power Circuit Design Using Advanced CMOS Technology
Low Power Circuit Design Using Advanced CMOS Technology is a summary of lectures from the first Advanced CMOS Technology Summer School (ACTS) 2017. The slides are selected from the handouts, while the text was edited according to the lecturers talk. ACTS is a joint activity supported by the IEEE Circuit and System Society (CASS) and the IEEE Solid-State Circuits Society (SSCS). The goal of the school is to provide society members as well researchers and engineers from industry the opportunity to learn about new emerging areas from leading experts in the field. ACTS is an example of high-level continuous education for junior engineers, teachers in academe, and students. ACTS was the results of a successful collaboration between societies, the local chapter leaders, and industry leaders. This summer school was the brainchild of Dr. Zhihua Wang, with strong support from volunteers from both the IEEE SSCS and CASS. In addition, the local companies, Synopsys China and Beijing IC Park, provided support. This first ACTS was held in the summer 2017 in Beijing. The lectures were given by academic researchers and industry experts, who presented each 6-hour long lectures on topics covering process technology, EDA skill, and circuit and layout design skills. The school was hosted and organized by the CASS Beijing Chapter, SSCS Beijing Chapter, and SSCS Tsinghua Student Chapter. The co-chairs of the first ACTS were Dr. Milin Zhang, Dr. Hanjun Jiang and Dr. Liyuan Liu. The first ACTS was a great success as illustrated by the many participants from all over China as well as by the publicity it has been received in various media outlets, including Xinhua News, one of the most popular news channels in China.
High-K Gate Dielectrics for CMOS Technology
A state-of-the-art overview of high-k dielectric materials for advanced field-effect transistors, from both a fundamental and a technological viewpoint, summarizing the latest research results and development solutions.
CMOS image sensors
The book describes the operating principles of CMOS images sensors, their architecture and performance, on-chip and external electronics, and characterisation techniques. Most of the book explores the pinned photodiode pixel, the experimental methods for image sensor characterisation, and presents many practical examples.
Design of CMOS Operational Amplifiers
CMOS operational amplifiers (Op Amps) are one of the most important building blocks in many of today's integrated circuits. This cutting-edge volume provides you with an analytical method for designing CMOS Op Amp circuits, placing emphasis on the practical aspects of the design process. This unique book takes an in-depth look at CMOS differential amplifiers, explaining how they are the main part of all Op Amps. The book presents important details and a design method for the different architectures of single ended Op Amps. You find complete chapters dedicated to the critical issues of CMOS output stages, fully differential Op Amps, and CMOS reference generators. This comprehensive book also includes an introduction to CMOS technology and the basics of the physical aspects of MOS transistors, providing you with the foundation needed to fully master the material.
Transient-Induced Latchup in CMOS Integrated Circuits
The book all semiconductor device engineers must read to gain a practical feel for latchup-induced failure to produce lower-cost and higher-density chips. Transient-Induced Latchup in CMOS Integrated Circuits equips the practicing engineer with all the tools needed to address this regularly occurring problem while becoming more proficient at IC layout. Ker and Hsu introduce the phenomenon and basic physical mechanism of latchup, explaining the critical issues that have resurfaced for CMOS technologies. Once readers can gain an understanding of the standard practices for TLU, Ker and Hsu discuss the physical mechanism of TLU under a system-level ESD test, while introducing an efficient component-level TLU measurement setup. The authors then present experimental methodologies to extract safe and area-efficient compact layout rules for latchup prevention, including layout rules for I/O cells, internal circuits, and between I/O and internal circuits. The book concludes with an appendix giving a practical example of extracting layout rules and guidelines for latchup prevention in a 0.18-micrometer 1.8V/3.3V silicided CMOS process. Presents real cases and solutions that occur in commercial CMOS IC chips Equips engineers with the skills to conserve chip layout area and decrease time-to-market Written by experts with real-world experience in circuit design and failure analysis Distilled from numerous courses taught by the authors in IC design houses worldwide The only book to introduce TLU under system-level ESD and EFT tests This book is essential for practicing engineers involved in IC design, IC design management, system and application design, reliability, and failure analysis. Undergraduate and postgraduate students, specializing in CMOS circuit design and layout, will find this book to be a valuable introduction to real-world industry problems and a key reference during the course of their careers.
Engineering the CMOS library
\"This book is about gaining a competitive edge in the Integrated Circuit IC marketplace. It suggests that there is an unrecognized value hidden in the safety margins of descriptive views in any piece of intellectual property (IP). This hidden value is normally left on the table. However, it can be used by the aggressive design engineer (or manager) to surpass the competition in the marketplace. This text reveals how the typical design house can enhance performance, reduce power, and improve the density of standard-cell logic. It will show how to add value to the generic, foundry-provided standard-cell library that most companies use without modification. Lastly, it identifies the low-risk opportunities aggressive designers and managers can employ to improve margin from overdesigned standard cells. \"--. \"This book is about gaining a competitive edge in the Integrated Circuit IC marketplace\"
Frontiers in electronics
Frontiers in Electronics includes the best papers of WOFE-11 invited by the Editors and down selected after the peer review process. This book is conceived to make available in the international arena extended versions of selected, high impact talks. The papers are divided into four sections: advanced terahertz and photonics devices; silicon and germanium on insulator and advanced CMOS and MOSHFETs; nanomaterials and nanodevices; wide band gap technology for high power and UV photonics.
Hybrid CMOS Single-Electron-Transistor Device and Circuit Design
Take advantage of the low-power consumption and enhanced functionality of SETs (single electron transistors) along with the high-speed driving and voltage gain of CMSO technology. This cutting-edge resource provides you with the conceptual framework for CMSO-SET hybrid circuit design. Supported with over 180 illustrations and packaged with a CD-ROM of practical supplementary material, the book explains spice simulation of SETs and co-simulation with CMOS, introduces specific design strategies for hybrid CMOS-SET circuits, and presents CMOS-SET co-fabrication techniques. You gain a thorough understanding of the pros and cons of digital SETs, learn how SETs can help to solve the intrinsic drawbacks of CMOS technology, and discover how the hybridization of both technologies can produce new analog functionalities which are difficult to achieve in a pure CMOS approach. From the basic physics of single electron transistors and SET modeling, to advanced concepts like CMSO-SET co-integration, the book helps you realize significant performance benefits by showing you how to incorporate SET technology into your design projects.
CMOS data converters for communications
This work explains in detail how to derive data converter requirements for a given communication system (baseband, passband, and multi-carrier systems). The authors also review CMOS data converter architectures and discuss their suitability for communications. The rest of the book is dedicated to high-performance CMOS data converter architecture and circuit design. Pipelined ADCs, parallel ADCs with an improved passive sampling technique, and oversampling ADCs are the focus for ADC architectures, while current-steering DAC modelling and implementation are the focus for DAC architectures. The principles of the switched-current and the switched-capacitor techniques are reviewed and their applications to crucial functional blocks such as multiplying DACs and integrators are detailed. CM OS Data Converters for Communications distinguishes itself from other data converter books by emphasizing system-related aspects of the design and frequency-domain measures. The book outlines the design of the basic building blocks such as operational amplifiers, comparators, and reference generators with emphasis on the practical aspects.