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Flexible solar cells have a lot of market potential for application in photovoltaics integrated into buildings and wearable electronics because they are lightweight, shockproof and self-powered. Silicon solar cells have been successfully used in large power plants. However, despite the efforts made for more than 50 years, there has been no notable progress in the development of flexible silicon solar cells because of their rigidity 1 – 4 . Here we provide a strategy for fabricating large-scale, foldable silicon wafers and manufacturing flexible solar cells. A textured crystalline silicon wafer always starts to crack at the sharp channels between surface pyramids in the marginal region of the wafer. This fact enabled us to improve the flexibility of silicon wafers by blunting the pyramidal structure in the marginal regions. This edge-blunting technique enables commercial production of large-scale (>240 cm 2 ), high-efficiency (>24%) silicon solar cells that can be rolled similarly to a sheet of paper. The cells retain 100% of their power conversion efficiency after 1,000 side-to-side bending cycles. After being assembled into large (>10,000 cm 2 ) flexible modules, these cells retain 99.62% of their power after thermal cycling between −70 °C and 85 °C for 120 h. Furthermore, they retain 96.03% of their power after 20 min of exposure to air flow when attached to a soft gasbag, which models wind blowing during a violent storm. Modules of foldable crystalline silicon solar cells retain their power-conversion efficiency after being subjected to bending stress or exposure to air-flow simulations of a violent storm.

Ultrathin two-dimensional (2D) semiconducting layered materials offer great potential for extending Moore’s law of the number of transistors in an integrated circuit 1 . One key challenge with 2D semiconductors is to avoid the formation of charge scattering and trap sites from adjacent dielectrics. An insulating van der Waals layer of hexagonal boron nitride (hBN) provides an excellent interface dielectric, efficiently reducing charge scattering 2 , 3 . Recent studies have shown the growth of single-crystal hBN films on molten gold surfaces 4 or bulk copper foils 5 . However, the use of molten gold is not favoured by industry, owing to its high cost, cross-contamination and potential issues of process control and scalability. Copper foils might be suitable for roll-to-roll processes, but are unlikely to be compatible with advanced microelectronic fabrication on wafers. Thus, a reliable way of growing single-crystal hBN films directly on wafers would contribute to the broad adoption of 2D layered materials in industry. Previous attempts to grow hBN monolayers on Cu (111) metals have failed to achieve mono-orientation, resulting in unwanted grain boundaries when the layers merge into films 6 , 7 . Growing single-crystal hBN on such high-symmetry surface planes as Cu (111) 5 , 8 is widely believed to be impossible, even in theory. Nonetheless, here we report the successful epitaxial growth of single-crystal hBN monolayers on a Cu (111) thin film across a two-inch c -plane sapphire wafer. This surprising result is corroborated by our first-principles calculations, suggesting that the epitaxial growth is enhanced by lateral docking of hBN to Cu (111) steps, ensuring the mono-orientation of hBN monolayers. The obtained single-crystal hBN, incorporated as an interface layer between molybdenum disulfide and hafnium dioxide in a bottom-gate configuration, enhanced the electrical performance of transistors. This reliable approach to producing wafer-scale single-crystal hBN paves the way to future 2D electronics. The epitaxial growth of single-crystal hexagonal boron nitride monolayers on a copper (111) thin film across a sapphire wafer suggests a route to the broad adoption of two-dimensional layered semiconductor materials in industry.

A highly promising route to scale millions of qubits is to use quantum photonic integrated circuits (PICs), where deterministic photon sources, reconfigurable optical elements, and single-photon detectors are monolithically integrated on the same silicon chip. The isolation of single-photon emitters, such as the G centers and W centers, in the optical telecommunication O-band, has recently been realized in silicon. In all previous cases, however, single-photon emitters were created uncontrollably in random locations, preventing their scalability. Here, we report the controllable fabrication of single G and W centers in silicon wafers using focused ion beams (FIB) with high probability. We also implement a scalable, broad-beam implantation protocol compatible with the complementary-metal-oxide-semiconductor (CMOS) technology to fabricate single telecom emitters at desired positions on the nanoscale. Our findings unlock a clear and easily exploitable pathway for industrial-scale photonic quantum processors with technology nodes below 100 nm. The recently demonstrated approaches to fabrication of quantum emitters in silicon result in their random positioning, hindering applications in quantum photonic integrated circuits. Here the authors demonstrate controlled fabrication of telecom-wavelength quantum emitters in silicon wafers by focused ion beams.

The uniform growth of single-crystal graphene over wafer-scale areas remains a challenge in the commercial-level manufacturability of various electronic, photonic, mechanical, and other devices based on graphene. Here, we describe wafer-scale growth of wrinkle-free single-crystal monolayer graphene on silicon wafer using a hydrogen-terminated germanium buffer layer. The anisotropic twofold symmetry of the germanium (110) surface allowed unidirectional alignment of multiple seeds, which were merged to uniform single-crystal graphene with predefined orientation. Furthermore, the weak interaction between graphene and underlying hydrogen-terminated germanium surface enabled the facile etch-free dry transfer of graphene and the recycling of the germanium substrate for continual graphene growth.

The suction cups found in octopus tentacles are the inspiration for a synthetic adhesive that functions well in dry and wet conditions and is resistant to chemical contamination. Octopus-inspired sticky patch Adhesives fall broadly into two categories, working either through chemical bonding or attraction at the interface, or through mechanical interlocking to ensure that surfaces stick together. Finding an adhesive in either of these categories that works under dry conditions and when immersed in liquids, and isn't readily contaminated, is an ongoing challenge. Changhyun Pang and colleagues have taken inspiration from the shape of octopus suckers to develop and fabricate a textured polymer patch that adheres through mechanical deformation. The patch displays good adhesive properties in various media, yet is resistant to chemical contamination. Adhesion strategies that rely on mechanical interlocking or molecular attractions between surfaces can suffer when coming into contact with liquids 1 , 2 . Thus far, artificial wet and dry adhesives have included hierarchical mushroom-shaped or porous structures that allow suction or capillarity 3 , 4 , 5 , 6 , supramolecular structures comprising nanoparticles 7 , and chemistry-based attractants that use various protein polyelectrolytes 8 , 9 , 10 . However, it is challenging to develop adhesives that are simple to make and also perform well—and repeatedly—under both wet and dry conditions, while avoiding non-chemical contamination on the adhered surfaces 11 . Here we present an artificial, biologically inspired, reversible wet/dry adhesion system that is based on the dome-like protuberances found in the suction cups of octopi. To mimic the architecture of these protuberances 12 , 13 , 14 , we use a simple, solution-based, air-trap technique that involves fabricating a patterned structure as a polymeric master, and using it to produce a reversed architecture, without any sophisticated chemical syntheses or surface modifications. The micrometre-scale domes in our artificial adhesive enhance the suction stress. This octopus-inspired system exhibits strong, reversible, highly repeatable adhesion to silicon wafers, glass, and rough skin surfaces under various conditions (dry, moist, under water and under oil). To demonstrate a potential application, we also used our adhesive to transport a large silicon wafer in air and under water without any resulting surface contamination.

Two-dimensional (2D) materials such as graphene and transition-metal dichalcogenides reveal the electronic phases that emerge when a bulk crystal is reduced to a monolayer 1 – 4 . Transition-metal oxide perovskites host a variety of correlated electronic phases 5 – 12 , so similar behaviour in monolayer materials based on transition-metal oxide perovskites would open the door to a rich spectrum of exotic 2D correlated phases that have not yet been explored. Here we report the fabrication of freestanding perovskite films with high crystalline quality almost down to a single unit cell. Using a recently developed method based on water-soluble Sr 3 Al 2 O 6 as the sacrificial buffer layer 13 , 14 we synthesize freestanding SrTiO 3 and BiFeO 3 ultrathin films by reactive molecular beam epitaxy and transfer them to diverse substrates, in particular crystalline silicon wafers and holey carbon films. We find that freestanding BiFeO 3 films exhibit unexpected and giant tetragonality and polarization when approaching the 2D limit. Our results demonstrate the absence of a critical thickness for stabilizing the crystalline order in the freestanding ultrathin oxide films. The ability to synthesize and transfer crystalline freestanding perovskite films without any thickness limitation onto any desired substrate creates opportunities for research into 2D correlated phases and interfacial phenomena that have not previously been technically possible. Ultrathin freestanding crystalline films of transition-metal oxide perovskites are fabricated and transferred to various substrates, proving their potential for exploring emergent 2D correlated phases.

Flatness is an essential feature for evaluating the quality of silicon wafers, which is controlled by multi-step Chemical Mechanical Polishing (CMP) processes. The addition of chemicals in CMP slurry has become a common method to improve the flatness of silicon substrate. However, due to the molecular structure diversity, choosing suitable additives to improve silicon wafer flatness needs trial-and-error experiments, which are cumbersome and time-consuming. To address these limitations, this study introduces a method combining both computational screening and experimental verification, effectively facilitating the selection of additives used in the flatness improvement of silicon wafers. The screening method identified two novel additives, 2,2-Dimorpholinodiethylether (DMDEE) and Trimorpholinophosphine oxide (TMPO). The experimental results show that these two additives can significantly enhance the global and local flatness of silicon substrate while minimizing the reduction in polishing rates. This study not only provides methodological guidance for the development of slurry formulation but also contributes to the mechanism exploration of flatness improvement for silicon CMP.

In the diamond wire sawing (DWS), the wire bow provides cutting force, reflecting the cutting ability and the saw wire cutting state, which is one of the important issues that need to be paid attention to in industrial production. Selecting the appropriate wire bow in the sawing process can not only improve the surface quality of the wafers, but also reduce the probability of breakage. Therefore, the prediction of the wire bow is of great significance for improving the yield of the wafers and reducing the wear of the diamond wire. In this paper, the force analysis of the wire bow formed by the sawing process is carried out, and the relationship between the cutting force and the material removal rate is obtained from the microscopic abrasive scratching process. The wire bow prediction model of diamond wire sawing based on process parameters is founded, and the accuracy of the model is verified by experiments. The established model is used to analyze the influence of process parameters on the wire bow in the current solar photovoltaic silicon cell substrate cutting, which provides guiding significance for diamond wire sawing production.

The shape of a bare wafer is round, so it is called a wafer or a silicon wafer. It is the basis for the production of silicon semiconductor integrated circuits. The silicon wafer is cut from a large piece of semiconductor material silicon ingot. The high-purity polysilicon (its purity is up to 99.999999999%) is into a large single crystal, given the correct orientation and an appropriate amount of N-type or P-type doping, a silicon ingot is obtained through five-step crystal growth. Wafers (wafers) are then made from silicon ingots by more than eight processes. This paper investigates the single crystal silicon growth and wafer preparation process technology, and finally discusses the evolution of wafer size growth and changes in the development of the semiconductor industry chain.