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Electronic manufacturing and design companies maintain test sites for a range of products. These products are designed according to the end-user requirements. The end user requirement, then, determines which of the proof of design and manufacturing tests are needed. Test sites are designed to carry out two things, i.e., proof of design and manufacturing tests. The team responsible for designing test sites considers several parameters like deployment cost, test time, test coverage, etc. In this study, an automated test site using a supervised machine learning algorithm for testing an ultra-high frequency (UHF) transceiver is presented. The test site is designed in three steps. Firstly, an initial manual test site is designed. Secondly, the manual design is upgraded into a fully automated test site. And finally supervised machine learning is applied to the automated design to further enhance the capability. The manual test site setup is required to streamline the test sequence and validate the control and measurements taken from the test equipment and unit under test (UUT) performance. The manual test results showed a high test time, and some inconsistencies were observed when the test operator was required to change component values to tune the UUT. There was also a sudden increase in the UUT quantities and so, to cater for this, the test site is upgraded to an automated test site while the issue of inconsistencies is resolved through the application of machine learning. The automated test site significantly reduced test time per UUT. To support the test operator in selecting the correct component value the first time, a supervised machine learning algorithm is applied. The results show an overall improvement in terms of reduced test time, increased consistency, and improved quality through automation and machine learning.

In the context of enhancing the production efficiency of semiconductor chips during mass production, the utilization of automated test machines (ATE) becomes imperative for assessing chip quality. Test data sets generated by certain automated test machines are typically presented in text format and exhibit characteristics such as high dimensionality, heterogeneity, and substantial volume. This study takes the Ultraflex automated test machine, manufactured by Teradyne as an illustrative example. The output test results from this machine are formatted as text, possessing poor readability, thereby posing challenges in the analysis of test data. Addressing the complexities associated with the analysis of high-dimensional, heterogeneous, and massive text test datasets produced by Ultraflex test chips, this paper introduces a visualization method utilizing word embedding based on Natural Language Processing (NLP) and quality feature spectrum. Initially, NLP is employed to transform semi-structured data into a structured format, facilitating the extraction of pertinent information from the test data set. Subsequently, leveraging the structured test data, the quality spectrum of the chip is established, enabling a quantitative analysis of the chip's quality. The proposed method's efficacy is ultimately validated through the application to a set of ADC test data.

Modern avionics can account for around 30% of the total cost of the aircraft. Therefore, it is essential to reduce the operational cost of avionics during a lifetime. This article addresses the critical scientific problem of creating the appropriate maintenance models for digital avionics systems that significantly increase their operational effectiveness. In this research, we propose the lifecycle cost equations to select the best option for the maintenance of digital avionics. The proposed cost equations consider permanent failures, intermittent faults, and false-positives occurred during the flight. The lifecycle cost equations are determined for the warranty and the post-warranty interval of aircraft operation. We model several maintenance options for each period of service. The cost equations consider the characteristics of the permanent failures and intermittent faults, conditional probabilities of in-flight false-positive and true-positive as well as the cost of different maintenance operations, duration of the flight, and some other parameters. We have demonstrated that a three-level post-warranty maintenance variant with a detector of intermittent faults is the best because it minimizes the total expected maintenance cost several folds compared to other maintenance options.

The paper discusses a novel temperature controller and a related test method allowing in-situ measurement of total ionising dose-induced changes in the impact of temperature on electronic devices for space applications. Various results of pilot radiation experiments (testing commercial PMOS transistors, RADFETs, and voltage references) are also presented.

In this paper, we describe how a phase switching technique is used to control the harmonic contents of a generated sinusoidal signal using digital signal processing techniques. We will describe how this technique equalizes the harmonic performance of arbitrary waveform generators installed in a large scale integration test system, allowing extended performance testing of the total harmonic distortion of an analog-to-digital converter that ordinarily would be possible only using more advanced test equipment. Once a device has been characterized and correlated to the bench, a test engineer is required to release the product into production. One of the major issues surrounding this exercise is the difference in the obtained results between testers of the same manufacture for parameters sensitive to harmonics, noise, and spurious components such as total harmonic distortion. By using the techniques developed in this paper, the user will be able to deploy an academic solution to an industrial problem and extend the range of test equipment that ordinarily would need to be discarded for such test requirements. We will then show the gauge repeatability and reproducibility between two testers of the same manufacture, and how using the described technique produces a better correlation, thus allowing less stringent guard-bands to guarantee the performance of those devices that have performance criteria close to the device specification. This work also goes some way to proving previous papers’ works on distortion shaping testing to enhance the spectral performance of arbitrary waveform generators.

Within the semiconductor manufacturing chain the automated testing steps are coming increasingly into focus. Delivering enhanced functionality per IC is expected, with the costs per die being reduced, while, at the same time, the costs of semiconductor electrical tests increase disproportionately. In addition, the requirements for quality are significantly growing, in general, and in particular, being ensured by automated testing. Hence, the execution of test development and test method quality are becoming an important, competitive-advantage topic. This paper presents a case study that evidences such advantage by adopting software engineering methodologies in test program generation. A software cost model applied to test program development parameters, assessed in combination with Bayesian analysis and Gaussian statistical methods, is discussed in detail. Furthermore, the results obtained indicate the effectiveness of the proposed approach, evidencing a remarkable effort reduction, and address quality robustness in semiconductor test engineering.

Purpose - Production of a high variety of products introduces complexities in the quality processes involved in a manufacturing system. Previous methods of quality assurance and control are not sufficient to manage the quality characteristics that are significant to each customer. Research into quality management for these environments has been isolated and segmented. No framework exists to holistically manage product quality within an unstable manufacturing environment. This paper seeks to propose a method of holistically managing product quality in a manufacturing environment with high customer input and product variety. The development of a reconfigurable inspection apparatus is discussed as a technological requirement for performing the quality control aspect of the management system. Design/methodology/approach - The quality requirements of modern manufacturing systems were established. The required flow of information for an advanced quality management system was proposed and compared to the information flow in a traditional quality management system. The developed reconfigurable inspection apparatus was tested by performing an inspection of a product configuration within a part family of torches. Commercial products were used for the construction of the apparatus, including the electrical and software aspects. A commercially available simulation package was used to simulate the effects of a random customer order on production flow whilst implementing the developed apparatus. Findings - Modular inspection equipment would prove essential to the implementation of quality control when considering advanced manufacturing environments. An overall management system is also needed for the verification of product quality as per individual customer requirements. Quality needs to be integrated as per TQM principles. Research limitations/implications - Traditional quality control tools may not always be applicable for unstable market demand. The research indicated the required progression of quality systems to successfully manage the quality for advanced manufacturing. The widespread availability of commercial components for the inspection apparatus verified the shift in supplier focus to meet the needs of shifting manufacturing requirements. Practical implications - The proposed approach to assure and control quality, as well as the researched inspection apparatus, provided the capability of being implemented in a manufacturing environment that involves production of a variety of products as opposed to being limited to one part family. The use of modular mechanical, electrical and software components will ease the implementation of reconfigurable inspection stations into existing manufacturing setups. Originality/value - Research indicated that quality systems need to be further developed for assuring and controlling product quality of products with high customer input. No system existed that could holistically consider the quality requirements of a product from design to delivery.

Today’s economical cycles challenge the test program generation process for semiconductors with regard to productivity, time-to-market, increasing quality requirements and manufacturing robustness, while, at the same time, the complexity of the system-on-a-chip mixed-signal integrated circuits to be tested increases significantly. Furthermore, commercial challenges in combination with competitive advantage become an important factor, not only within semiconductor manufacturing, but also within test program development. This paper provides a review of these challenges, and how they might be addressed. We first give a short introduction and background on semiconductor testing and test development with the focus on mixed-signal and systems-on-chip. This is followed by current roadmaps and considerations for test program software development. Based on the highlighted strength and weaknesses of the reviewed approaches, the authors conclude with some recommendations to address these challenges by adopting software engineering methods for the test program development process.

This paper presents a Built-In Self-Test (BIST) technique to test the setup and hold times of memory interface circuitry. The BIST scheme generates data and clock using an on-chip pattern generator. The relative timing difference between data and clock is controlled using a cycle-by-cycle control method for testing. Two test methods of static and dynamic modes have been presented to measure the timing difference and then are used to specify the setup and hold times. The static mode is mainly used to detect pass or fail for timing specifications, and the dynamic mode is devised to measure the amount of timing mismatches and thus detect timing margin degradations due to the timing delay mismatches. Using these two test modes, the BIST scheme obtains test results with low frequency signals, which are compatible with low performance testers. The test chip including the BIST scheme has been fabricated with a commercial 0.18-μm CMOS process. The chip measurement results are shown to validate the testability of the BIST scheme for the setup and hold times of memory devices.

Purpose – The purpose of this paper is to apply an on‐line automatic inspection and measurement of surface defect of thin‐film transistor liquid‐crystal display (TFT‐LCD) panels in the polyimide coating process with a modified template matching method and back propagation neural network classification method.Design/methodology/approach – By using the technique of searching, analyzing, and recognizing image processing methods, the target pattern image of TFT‐LCD cell defects can be obtained.Findings – With template match and neural network classification in the database of the system, the program judges the kinds of the target defects characteristics, finds out the central position of cell defect, and analyzes cell defects.Research limitations/implications – The recognition speed becomes faster and the system becomes more flexible in comparison to the previous system. The proposed method and strategy, using unsophisticated and economical equipment, is also verified. The proposed method provides highly accurate results with a low‐error rate.Practical implications – In terms of sample training, the principles of artificial neural network were used to train the sample detection rate. In sample analysis, character weight was implemented to filter the noise so as to enhance discrimination and reduce detection.Originality/value – The paper describes how pre‐inspection image processing was utilized in collaboration with the system to excel the inspection efficiency of present machines as well as for reducing system misjudgment. In addition, the measure for improving cell defect inspection can be applied to production line with multi‐defects to inspect and improve six defects simultaneously, which improves the system stability greatly.