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To solve the problem of energy loss caused by low energy utilization rate in the process of magnetic pulse welding (MPW), this paper presents a method to recover the energy after the first half wave of pulse current by using auxiliary capacitance. A detailed introduction of the working process of the improved discharge circuit was first carried out. Then experimental investigation of the current waveform of the main discharge circuit and analyzed numerically of the improved MPW system were investigated. The experimental results of the current waveform of the main discharge loop agree well with the simulation results, which verifies the feasibility of the proposed method. The simulation results show that the energy loss decreases from 95.3% before the improvement to 36% after the improvement, and the energy utilization rate increases by 261.5%. According to the welding window theory, the welding quality of this method is the same as that of the traditional method. It shows that this method can greatly improve the energy utilization rate of magnetic pulse welding without reducing the welding quality and verifies the effectiveness of this method.

In modern aircraft designs, following the More Electrical Aircraft (MEA) philosophy, there is a growing need for new high-power converters. In this context, innovative solutions to provide high efficiency and power density are required. This paper proposes an unregulated LLC full-bridge operating at resonant frequency to obtain a constant gain at all loads. The first harmonic approximation (FHA) model is not accurate enough to estimate the voltage gain in converters with high parasitic resistance. A modified FHA model is proposed for voltage gain analysis, and time-based models are used to calculate the instantaneous current required for the ZVS transition analysis. A method using charge instead of current is proposed and used for this ZVS analysis. Using this method, an auxiliary circuit is proposed to achieve complete ZVS within the whole load range, avoiding a gapped transformer design and increasing the efficiency and power density. A 28 Vdc output voltage prototype, with 10 kW peak output power, has been developed to validate the theoretical analysis and the proposed auxiliary circuit. The maximum efficiency (96.3%) is achieved at the nominal power of 5 kW.

As microprocessor currents exceed 500 A and slew rate reaches 1000 A/µs, increasing the decoupling capacitance on the motherboard to ensure normal operation of the microprocessor is inevitable because of the limited response capability of the voltage regulator. However, the area of the motherboard used for capacitors is usually narrow. To reduce the required capacitance, a novel buck converter with an auxiliary circuit for charge compensation using switched capacitors is proposed. The auxiliary circuit is not activated during the steady state. When the load current changes rapidly, the switched capacitors can quickly absorb or release charge to suppress voltage fluctuations. A 12 V–0.9 V buck converter has been built and tested under a 480 A load current step and a 960 A/µs current slew rate. The proposed scheme with 9.964 mF capacitance has an overshoot of 115 mV and an undershoot of 89 mV. Compared with the conventional PID scheme, the proposed scheme can save 58.4% of the capacitance for the same voltage fluctuations or suppress 39.5% of overshoot and 37.3% of undershoot with the same capacitance.

This paper proposes a zero-voltage-switching (ZVS) Buck/Boost converter (BBC). In addition, an auxiliary circuit based on a coupled inductor is introduced to realize ZVS for the main MOSFETs. The magnetic coupling inductor plays the role of filtering and provides ZVS conditions for the main MOSFETs. Since all of the switches can achieve soft switching conditions, and the conduction loss of the auxiliary circuit is small, the conversion efficiency for the overall system is improved. When compared with the traditional ZVS implementation methods based on magnetic coupling inductors used in Buck, Boost, and Buck/Boost converters, the proposed topology can prevent current notches on the current waveform of the input source. Since there are no notches on the input source current, when the proposed ZVS implementation method is applied to an interleaved parallel BBC structure, it has a smaller current ripple of the input source. Finally, experimental results are given and analyzed. Based on these results, both the ZVS conditions and efficiency improvement are verified.

To reduce the current harmonics on the input side of a multi-pulse rectifier, this paper proposes a low harmonic current source series multi-pulse rectifier based on an auxiliary passive injection circuit at the DC side. The rectifier only needs to add an auxiliary passive injection circuit on the DC side of the series 12-pulse rectifier, which can change its AC input voltage from 12-step waves to 24-step waves. We analyzed the working mode of the rectifier, optimized the optimal turn ratio of the injection transformer from the perspective of minimizing the total harmonic distortion (THD) value of the input voltage on the AC side, and analyzed the diode open circuit fault in the auxiliary passive injection circuit. Test verification shows that, after using the passive harmonic injection circuit, the THD value of the input voltage of the AC side of the rectifier is reduced from 14.03% to 4.86%. The THD value of the input current is reduced from 5.30% to 2.16%. The input power factor has been increased from 98.86% to 99.83%, and the power quality has been improved.

The isolated three-level DC/DC converter (ITLDC) can be used to charge electric vehicles. During the constant current charging stage, the ITLDC can be designed to realize nature zero voltage switching (ZVS). However, during the constant voltage charging stage, the charging current is small; thus, nature ZVS cannot be realized. This paper presents an active commutation auxiliary circuit (ACAC) for the ITLDC to realize the full load range ZVS. With the proposed ACACs, all the main switches achieve zero-voltage turn-on and quasi zero-voltage turn-off, and the auxiliary switches realize zero current turn-on and zero-voltage turn-off; thus, the efficiency will be high. The auxiliary currents generated by the ACACs are controllable. During the constant current charging stage, the ITLDC realizes nature ZVS and the auxiliary currents are controlled to zero; thus, the ACACs do not result in high current stress or bring in additional losses, and the efficiency will be high. During the constant voltage charging stage, the charging current decreases with charging time and the charging current is too small to realize nature ZVS. Thus, the ITLDC can work with the proposed ACACs and the auxiliary currents can be controlled within a suitable value to realize ZVS. With the proposed ACACs, the ITLDC can realize ZVS during the whole charging process; thus, the efficiency will be high. The structure and operating principle of the ITLDC with ACACs are introduced and the performance of the proposed TLDC is experimentally verified on a 1.5 kW prototype converter.

This study presents a novel soft-switching inverter distinguished by a simplified topology and an innovative modulation approach. The design aims to optimize the energy conversion processes commonly found in auxiliary snubber circuits. By minimizing the number of auxiliary switches, the control method is streamlined, thereby enhancing system reliability and cost-efficiency. The principles of operation and conditions for soft-switching are thoroughly analyzed using equivalent circuit models. A 3 kW/16 kHz inverter prototype was constructed, and the experimental results confirm the effectiveness and benefits of the proposed inverter.

A novel interleaved boost dc/dc converter with zero-current-switching pulse-width-modulation (ZCS-PWM) characteristic using a simple ZCS-PWM auxiliary circuit is presented in this paper. The proposed converter combines the conventional PWM technique and ZCS technique to promote the circuit performance. The proposed converter uses dual boost converters which are operated at interleaved mode to increase the output power level. Thus, the proposed converter does not only decreases the current stress on main circuit devices but reduces the input ripple current and output capacitor size. Because the proposed converter establishes a common ZCS-PWM auxiliary circuit on used dual boost converters, it can greatly reduce the size and cost. And, it can provide the ZCS characteristic on main switches and auxiliary switches with a wide range of load to improve the problem of switching losses and EMI. Thus, its topology is simple and compact. Besides operating at constant frequency and reducing commutation losses, the proposed converter has no additional current stress and conduction loss in the main switch compared with the conventional interleaved boost dc/dc converter. The principle of operation, theoretical analysis and experimental results of the proposed boost converter, rated 1 kW and operating at 40 kHz, are provided in this paper to verify the performance of this new family of converters.

In this study, a new family of pulse width modulation DC–DC converters is introduced. The proposed converters have one switch that turns on at zero current switching condition and turns off at zero voltage switching condition. The proposed auxiliary circuit can be used instead of converter switch in any non-isolated and isolated DC–DC converter. The buck converter from this converter family is analysed and its operating modes are discussed. The design considerations are presented and a prototype is realised. The experimental results confirm the validity of theoretical analysis.

A soft-switching pulse-width modulation (PWM) single-phase inverter using a voltage clamp soft-switching step-up/down dc link is proposed in this study. The proposed voltage clamp soft-switching step-up/down DC link not only provides the switches in the section of conventional PWM buck inverter operate at zero-voltage-switching (ZVS), but it has a step-up/down input voltage function and the switches in itself also operate at ZVS. Thus, except for the switch in the section of ZVS-PWM auxiliary circuit, all power semiconductor devices in proposed inverter operate at ZVS turn-on and turn-off. The switch in the section of ZVS-PWM auxiliary circuit operates at zero-current-switching (ZCS) turn-on and turn-off. Besides operating at constant frequency, the proposed inverter has no voltage stress and current stress on the main switch compared to the hard switching inverter counterpart. Auxiliary components rated at very small current are used. The principle of operation, theoretical analysis and experimental results of the proposed soft-switching inverter, rated 1 kW and operated at 40 kHz, are provided in this study to verify the performance.