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This paper presents a high‐precision, low‐power delta‐sigma modulator (DSM) designed for healthcare and medical diagnostics. It utilizes a hybrid switching integrator to reduce distortion caused by the non‐linear on‐resistance of switches at a low supply voltage. Leveraging the characteristics of the hybrid switching integrator, a non‐50% duty cycle sampling timing and a corresponding tunable Miller‐compensated operational transconductance amplifier are proposed to reduce resistor thermal noise and meet lower power consumption requirements. The DSM is simulated based on 130‐nm CMOS technology and achieves 93.5‐dB signal‐to‐noise‐plus‐distortion ratio at a 1‐kHz bandwidth while consuming 23.7 µW from a 1.5‐V supply. This paper presents a high‐precision, low‐power delta‐sigma modulator (DSM) designed for healthcare and medical diagnostics. It utilizes a hybrid switching integrator to reduce distortion caused by the non‐linear on‐resistance of switches at a low supply voltage. Leveraging the characteristics of the hybrid switching integrator, a non‐50% duty cycle sampling timing and a corresponding tunable Miller‐compensated operational transconductance amplifier are proposed to reduce resistor thermal noise and meet lower power consumption requirements. The DSM is simulated based on 130‐nm CMOS technology and achieves 93.5‐dB signal‐to‐noise‐plus‐distortion ratio at a 1‐kHz bandwidth while consuming 23.7 μW from a 1.5‐V supply.

This letter proposes a reconfigurable bandpass noise‐shaping successive approximation register analog‐to‐digital converter (ADC) with a cascade of integrators with feedforward (CIFF) structure. Unlike conventional CIFF structures that use a passive feedforward path, the new design incorporates an amplifier within the filter, providing effective bandpass noise transfer function regardless of passband location, and facilitating the use of a unity gain 2‐input comparator for low noise and high stability. The loop filter includes amplification by a low power Gm‐R amplifier and two‐step charge sharing. The proposed ADC supports three different intermediate frequencies (IFs), and 12‐bit resolution is achieved for all IFs in a 28‐nm complementary metal‐oxide‐semiconductor (CMOS) process.

Frequency delta-sigma modulator (FDSM) employing a variable frequency oscillator is a novel replacement of the classical delta-sigma modulators. This is advantageous for application to sensors, because an ADC can be intrinsically integrated with the sensors. We have already proposed to use this technique to various sensors. However, the signal-to-noise ratio was significantly degraded by noise floor, in the previous papers. In this paper, we have investigated the origin of the noise floor in the FDSM microphone sensors as a promising example. It was demonstrated that improving the phase noise of the oscillator can drastically reduce the noise floor. For this reduction we improved the Q-factor of the cavity resonator, and the design of the oscillator circuit. With these improvements, the phase noise, and, hence, the noise floor, were improved by approximately 40 dB. In addition, we obtained an SNR of 57 dB for 114 dBSPL sound input with 96 kHz bandwidth, which corresponds to the dynamic range of 87 dB for maximum 140 dBSPL. A much larger dynamic range of around 120 dB is expected by increasing the sampling rate and decreasing the Al diaphragm thickness. These results also indicate the promise of the FDSM to varieties of physical sensors.

This paper explores the implementation of a VCO-based ADC, achieving an ENOB of 12 bits with 1 MHz of a sampling rate in the audio bandwidth. The solution exploits the scalability and PVT invariance of a novel digital-to-frequency converter to reduce the size and consumed power. The architecture has been validated in a 130 nm CMOS technology node displaying a power consumption of 105.57 μW and a silicon footprint of 0.034 mm2 in a pseudo-differential configuration. Performance can be dynamically adjusted to trade off power consumption by resolution without changing the sampling rate. In addition, the proposed architecture benefits from multiple instantiations in the same SoC, making it particularly suitable for sensor array applications, such as biomedical sensors and spatial audio arrays.

This article reports on a compact and low-power CMOS readout circuit for bioelectrical signals based on a second-order delta-sigma modulator. The converter uses a voltage-controlled, oscillator-based quantizer, achieving second-order noise shaping with a single opamp-less integrator and minimal analog circuitry. A prototype has been implemented using 0.18 μm CMOS technology and includes two different variants of the same modulator topology. The main modulator has been optimized for low-noise, neural-action-potential detection in the 300 Hz–6 kHz band, with an input-referred noise of 5.0 μVrms, and occupies an area of 0.0045 mm2. An alternative configuration features a larger input stage to reduce low-frequency noise, achieving 8.7 μVrms in the 1 Hz–10 kHz band, and occupies an area of 0.006 mm2. The modulator is powered at 1.8 V with an estimated power consumption of 3.5 μW.

This paper presents a BJT-based smart CMOS temperature sensor. The analog front-end circuit contains a bias circuit and a bipolar core; the data conversion interface features an incremental delta-sigma analog-to-digital converter. The circuit utilizes the chopping, correlated double sampling, and dynamic element matching techniques to mitigate the effects of process bias and nonideal device characteristics on measurement accuracy. Furthermore, based on the principle of charge conservation, the dynamic range utilization of the ADC increases. We propose a neural network that uses a multilayer convolutional perceptron to calibrate the sensor output results. Using the algorithm, the sensor achieves an inaccuracy of ±0.11 °C (3σ), exceeding the accuracy of ±0.23 °C (3σ) achieved without calibration. We implement the sensor in a 0.18 µm CMOS process, occupying an area of 0.42 mm2. It achieves a resolution of 0.01 °C and has a conversion time of 24 ms.

For next-generation biomedical and biochemical sensor nodes, the analog front-end demands a direct interface with current-output sensors, extreme miniaturization, and nanowatt power consumption to enable energy autonomy. This work directly addresses these needs by presenting a comparative analysis of four minimalist, first-order, current-mode ΔΣ modulator (ΔΣM) architectures. Optimized for ultra-low-voltage operation (supply ≤0.5 V), the investigated topologies—including resistive, switched-capacitor, and current-reference-based cores—exploit passive integration and charge-domain feedback, eliminating the need for power-hungry active blocks. Detailed circuit-level simulations confirm that, with ad hoc techniques, it is possible to achieve stable first-order noise shaping in the deep near-threshold region, delivering up to 10-bit resolution while consuming less than 10 nW at a 0.5 V supply voltage achieving a signal bandwidth in the sub-10 hertz range. This study validates that robust ΔΣ conversion is feasible under extreme area and power constraints by leveraging architectural simplicity. The clear performance–complexity trade-offs outlined make these current-mode architectures ideal candidates for monolithic integration within miniaturized, energy-autonomous sensing systems.

Solenoid valves are widely used for pressure regulation in soft pneumatic robots, but their inherent electromechanical nonlinearities—such as dead zones, saturation, and pressure-dependent dynamics—pose significant challenges for accurate control. Conventional pulse modulation techniques, including pulse-width modulation (PWM), often exacerbate these effects by neglecting valve-switching transients. This paper presents a physics-informed dynamic modelling framework that captures transient and pressure-dependent behaviours in solenoid valve-driven soft pneumatic systems operating under pulse modulation. The model is experimentally validated on a soft pneumatic actuator (SPA) platform using four modulation schemes: PWM, integral pulse frequency modulation (IPFM), its inverted variant (IIPFM), and ΔΣ modulation. Results demonstrate that only the IIPFM scheme produces near-linear input–pressure characteristics, in close agreement with model predictions. The proposed framework provides new physical insights into valve-induced nonlinearities and establishes a systematic basis for high-fidelity modelling and control of soft pneumatic robotic systems.

Solid-state transformers (SSTs) are expected to become one of the most powerful and adaptable devices that allow controllable voltage, power factor correction, fault isolation, compact size as compared to their low-frequency (50 Hz/60 Hz) counterparts. The high-frequency isolation of single-phase modified quasi-Z-source AC–AC converter (SPM-qZAC) employing bidirectional switches to create the single-stage SPM-qZAC-based SST is proposed in this paper. The proposed topology offers all the benefits of conventional impedance source topologies, including single-stage power conversion with a small footprint, buck–boost operation and retaining or reversing the phase angle. Moreover, the presented converter topology allows to share the same ground between input and output voltage, continuous input current, no input–output LC filters and performs AC–AC power conversion without the use of DC storage, making it suitable for AC voltage regulation. This study introduces two modulation schemes for SPM-qZAC-based SST. Finite control set model predictive control (FCS-MPC) which is a current control technique at variable switching frequency is employed owing to the capabilities of modern digital signal processing. Further, an adaptive hysteresis band-based delta sigma modulation (DSM) technique that offers the benefit of constant switching frequency (CSF) is proposed as an alternative voltage control-based modulation of the same topology. Various performance indices including steady-state response, total harmonic distortion of source current and dynamic response are assessed through simulation studies using MATLAB/Simulink software and real-time simulation environment using RT-Lab with OPAL-RT OP4510. It is observed that SPM-qZAC exhibits good performance when modulated using either modulation techniques; however, CSF-DSM technique offers an additional benefit of constant switching frequency.

There is a unique transmission method of visible light communication (VLC) that can transmit multiple data in multiple directions simultaneously by using a projector with the digital micro-mirror device (DMD). Previously, we proposed a method of transmitting data from the projector that transmits digitally modulated VLC signal from each pixel, and in this paper, we propose an extension of the method to transmit audio signal by using a special type of modulation called delta-sigma-modulation (DSM). The DSM-VLC system employs a simple receiver that comprises simple analog electric circuits, which contribute to low power consumption. We made a DSM-VLC prototype and verified that the prototype was able to send four different waves to different directions. Additionally, the experiments’ results agree very well with the simulation results. Furthermore, we designed two types of DSM: pulse width modulation (PWM) and pulse density modulation (PDM), and we verified that the PDM-VLC is better than the PWM-VLC regarding the DMD switching frequency’s efficiency. Our proposed DSM-VLC can be used for such applications as voice information guidance systems with direction-selective messages.