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In this study, a novel structure for cascade multilevel inverter is presented. The proposed inverter can generate all possible DC voltage levels with the value of positive and negative. The proposed structure results in reduction of switches number, relevant gate driver circuits and also the installation area and inverter cost. The suggested inverter can be used as symmetric and asymmetric structures. Comparing the peak inverse voltage and losses of the proposed inverter with conventional multilevel inverters show the superiority of the proposed converter. The operation and good performance of the proposed multilevel inverter have been verified by the simulation results of a single-phase nine-level symmetric and 17-level asymmetric multilevel inverter and experimental results of a nine-level and 17-level inverters. Simulation and experimental results confirmed the validity and effectiveness performance of the proposed inverter.

Light-emitting diodes (LEDs) have gained widespread adoption as solid-state lighting sources due to their compact size, long operational lifetime, high brightness, and mechanical robustness. This paper presents the development and implementation of an isolated AC-DC LED electronic lighting driver circuit that integrates a modified flyback converter with a lossless snubber circuit, along with inherent power factor correction (PFC). The proposed design operates the transformer’s magnetizing inductor in the discontinuous conduction mode (DCM), thereby naturally achieving PFC without the need for complex control circuitry. Furthermore, the circuit is capable of recycling the energy stored in the transformer’s leakage inductance, improving overall efficiency. The input current harmonics are shown to comply with the IEC 61000-3-2 Class C standard. A 72 W (36 V/2 A) prototype has been constructed and tested under a 110 V AC input. Experimental results confirm the effectiveness of the proposed design, achieving a power factor of 0.9816, a total harmonic distortion (THD) of 12.094%, an output voltage ripple factor of 9.7%, and an output current ripple factor of 11.22%. These results validate the performance and practical viability of the proposed LED driver architecture.

Recently applications of multilevel converters have been pointed out because of some advantages include high-quality output waveform, reduced harmonic distortion and lower electromagnetic interference. However, some drawbacks such as increased number of components like switches and dc power supplies and complex pulse width modulation control method are associated with these converters. In this study, a new cascade multilevel converter is introduced named ‘cascade-multi-cell’ converter. First, the basic constitutive of the proposed multilevel converter has been explained. Then, symmetric and asymmetric configurations are presented. The number of switches and gate driver circuits in the proposed structure are less than the conventional cascade converter. Therefore its output voltage levels will be increased. Also, the number of on-state switches is reduced in presented topology, and so the conductive losses will be reduced. The peak inverse voltage of the proposed converter is equal with the traditional cascade converter. Finally, simulation and experimental results are presented. The presented results show the validity and effectiveness of the proposed multilevel structure.

The increasing prevalence of common cold viruses and bacteria in daily life has heightened interest in sterilization lamp technologies. Compared with traditional mercury-based ultraviolet (UV) lamps, modern UV lamps offer advantages including extended operational lifespan, high energy efficiency, compact form factor, and the absence of hazardous materials, rendering them both safer and environmentally sustainable. In particular, UV-C LED lamps, which emit at short wavelengths, are capable of disrupting the molecular structure of DNA or RNA in microbial cells, thereby inhibiting cellular replication and achieving effective disinfection and sterilization. Conventional UV-C LED sterilization lamp driver circuits frequently employ a two-stage architecture, which requires a large number of components, occupies substantial physical space, and exhibits reduced efficiency due to multiple stages of power conversion. To address these limitations, this paper proposes a UV-C LED sterilization lamp driver circuit for an AC voltage supply, employing boundary conduction mode (BCM) control with integrated power factor correction (PFC). The proposed single-stage, single-switch topology combines a buck PFC converter and a flyback converter while recovering transformer leakage energy to further improve efficiency. Compared with conventional two-stage designs, the proposed circuit reduces the number of power switches and components, thereby lowering manufacturing cost and enhancing overall energy conversion efficiency. The operating principles of the proposed driver circuit are analyzed, and a prototype is developed for a 110 V AC input with an output specification of 10.8 W (90 V/0.12 A). Experimental results demonstrate that the prototype achieves an efficiency exceeding 92%, a power factor of 0.91, an output voltage ripple of 1.298%, and an output current ripple of 4.44%.

In floating gate compute-in-memory (CIM) chips, due to the gate equivalent capacitance of the large-scale array and the parasitic capacitance of the long-distance transmission wire, it is difficult to balance the switching speed and area of the word line driver circuit (WLDC). The difference among multiple voltage domains required for floating gate CIM devices has also far exceeded the withstand voltage range of a single transistor in the WLDC. This paper proposes a novel WLDC based on the working principle of the CIM array. A multi-level pre-processing voltage control method is adopted to carry out an optional hierarchical transmission of multiple high voltages, significantly reducing the propagation delay. The proposed WLDC is based on the Wilson current mirror structure, which substantially reduces the physical design area. The simulation results show that the circuit can convert a 1.2 V low-voltage domain input signal with a frequency of 10 MHz into a high-voltage domain output voltage, and the output voltage range of a single WLDC can reach −10 V to 10 V. With a capacitive load within 5 pF, the transmission delay is less than 10 ns. The layout area is 594.88 µm2, which is suitable for a large-scale CIM array.

This study proposed a micro light-emitting diode (µLED) pixel circuit with a short µLED current (I µLED ) delay time for mobile displays. A pixel circuit using complementary metal-oxide-semiconductor-type low-temperature polycrystalline silicon (LTPS) thin-film transistors (TFTs) was designed. The proposed pixel circuit used n-type LTPS TFTs as driving and emission TFTs for pulse width modulation and controlled the µLED operation sequence from the off- to the on-state. Because the pixel circuit's input signal characteristics could affect the I µLED delay time, the researchers also developed an integrated driver circuit with multiple output signals to operate the proposed pixel circuit. The pixel circuit operations were simulated by connecting the proposed pixel and integrated driver circuits. Consequently, the proposed pixel circuit exhibited a short I µLED delay time of 2.8 µs by enhancing the controllability over the driving TFTs for pulse amplitude modulation during µLED transition. The featured circuits can operate in normal and always-on display modes. The proposed circuits could be integrated into a 320 pixels per inch display based on the layout design. Therefore, the proposed pixel circuit can help improve low gray level expression capability because of the short I µLED delay time and can be used for high-resolution mobile µLED displays.

Designing high-speed 6T SRAM for efficient read and write operations poses a significant challenge for circuit designers. In this paper, we propose a 65 nm 6T SRAM architecture using sense amplifiers and write driver circuits to enhance the read and write performance. The sense amplifier helps the reading process go faster and the reading data be more stable. The write driver is designed with a symmetrical structure to reduce the write delay. In addition, the control circuit performs the checking process to synchronize read operations, optimize latency without interruption. The simulation result shows that the read delay and write delay are 58.66 ps and 79.67 ps, respectively. These delays outperform most of the other study.

This paper proposes a novel metal-oxide (MOx) thin-film transistors (TFT)-based scan driver circuit with a DC power-supplied buffer. This circuit has two parts: a 'carry generation block (CGB)' and an 'output generation block (OGB).' The CGB generates a carry pulse by the bootstrapping effect of pull-up TFT with the aid of clock signal; clock-supplied bootstrapping. Then the OGB is controlled by the carry pulse, and the output pulse is generated by the bootstrapping effect of pull-up buffer TFT with DC power supply; DC-supplied bootstrapping. In the proposed circuit, the pull-up TFT in CGB does not need to have wide dimensions because the carry signal is separated from the large capacitive load in the pixel area. Accordingly, the capacitive load of the clock signal is significantly reduced, and the dynamic power consumption associated with clock toggling decreases remarkably compared with the conventional scan driver circuit that uses the clock-supplied bootstrapping for the wide output buffer TFT. In addition, a bootstrapping inverter in OGB makes the output pulse width the same as the clock-high duration, preventing the output pulses from overlapping, which is required for most of the organic light-emitting diode (OLED) pixel circuits with in-pixel compensation.

We proposed an emission driver circuit based on metal-oxide thin-film transistors (TFTs), which is designed to ensure stable output characteristics by suppressing leakage currents at the main nodes when TFTs are operated in depletion mode. To do this, we employed control signals with different low-level voltages and switching TFTs connected to the series-connected two transistors. The simulation results indicate that the featured circuit operates stably within a threshold voltage range of −3 V to 4 V, showing improved output characteristics compared to the conventional circuit. The circuit was fabricated with dimensions of 79.4 × 700 µm 2 based on 320 pixels per inch, and the resulting fabricated circuit exhibits a stable output voltage. These results suggest that the proposed emission driver circuit operates reliably when TFTs are operated in depletion mode.

Metal-oxide (MOx) thin-film transistors (TFTs) require complex circuit structures to cope with their depletion mode characteristics, making them applicable only to large-area active matrix (AM) displays despite their low manufacturing cost and decent performance. In this paper, we report a simple MOx 10T-2C scan driver circuit that overcomes the depletion mode characteristics using a series-connected two transistor (STT) configuration and clock signals with two kinds of low-voltage levels. The proposed circuit has a wide operating range of TFT characteristics, i.e., −2.8 V ≤ VTH ≤ +3.0 V. Through the measurement results of the manufactured sample, it was confirmed that the performance and area of our circuit are suitable for high-resolution mobile displays.