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The main task of a railway undertaking is to transport passengers and/or freight safely and cost-effectively. This task is enabled by the use of energy carriers. Since most of the rolling stock operated by major railway undertakings is electric, an additional area of activity involves managing electricity consumption and supply processes. Every business activity entails risk, including energy-related operations. The aim of this paper is to develop a method for assessing the risks associated with a railway undertaking from an electrical perspective and, based on this method, to perform such an assessment. As part of the research, a universal risk assessment approach based on the M_o_R® (Management of Risk) methodology was developed. Risk identification was performed using the risk description principle, followed by risk estimation. The study proposes national-level variables and a procedure for determining them using publicly available data. Risk assessment and process evaluation were carried out using Monte Carlo simulation as a probabilistic tool for uncertainty propagation. As a result, the potential losses and gains that a railway undertaking may experience from an electrical perspective were estimated for scenarios in which the identified risks materialize.

In recent years, the research on the relationship between economic development and power consumption is also a focus of government departments at all levels. The development of electric power (EP) not only has an impact on power supply enterprises and EP industry, but also is closely related to the social and economic development of the whole region and residents’ life, that is, there must be some internal relationship between economic development and EP consumption. In many areas of our country, the situation of power consumption and economic development is not coordinated. Insufficient and untimely power supply will hinder economic growth, and excessive power supply will bring unnecessary waste of resources. This also reflects that the research on the relationship between economic development and power consumption is not in-depth, so the research on the relationship between power consumption and economic development has a certain theoretical significance. This paper studies the application of clustering algorithm based on data mining in the analysis of economic development characteristics(EDC) from the perspective of EP, uses K-means clustering algorithm to understand the relationship between EP development and economic development, understands its characteristic development application, studies the relationship between EP consumption and economy from the EP elastic coefficient method and output value unit consumption method, and uses K-means clustering algorithm to calculate, this paper uses the chart analysis method to analyze the correlation degree of power consumption structure and the relationship between different industrial GDP and power consumption. The results show that the total output of each industrial structure is in direct proportion to the power consumption. The total value of each industrial structure is increasing, and the power consumption is on the rise. For example, in 2016, the total value of the first industry was 186.81 trillion yuan, the second industry was 960.54 trillion yuan, the third industry was 515.96 trillion yuan, and the power consumption was 41.246 billion kwh, by 2020, the total value of the primary industry will be 220.66 trillion yuan, the secondary industry 1916.51 trillion yuan, the tertiary industry 866.22 trillion yuan, and its electricity consumption (EC) will be 57.697 billion kwh.

The standardization of fifth generation (5G) communications has been completed, and the 5G network should be commercially launched in 2020. As a result, the visioning and planning of 6G communications has begun, with an aim to provide communication services for the future demands of the 2030s. Here, we provide a vision for 6G that could serve as a research guide in the post-5G era. We suggest that human-centric mobile communications will still be the most important application of 6G and the 6G network should be human centric. Thus, high security, secrecy and privacy should be key features of 6G and should be given particular attention by the wireless research community. To support this vision, we provide a systematic framework in which potential application scenarios of 6G are anticipated and subdivided. We subsequently define key potential features of 6G and discuss the required communication technologies. We also explore the issues beyond communication technologies that could hamper research and deployment of 6G. This Perspective provides a vision for sixth generation (6G) communications in which human-centric mobile communications are considered the most important application, and high security, secrecy and privacy are its key features.

Advances in metal halide perovskite semiconductors for optoelectronic devices have revived research interest in their applicability in transistors. Despite initial challenges affecting perovskite-based transistors in terms of reproducibility and ambient-temperature operation capability, notable performance improvements have been achieved through the fine-tuning of channel material compositions, thin-film processing and device engineering. However, critical insight into the electrical properties of the materials is lacking, and their potential for application in large-area and microscale electronics remains unclear. Here we explore the development of metal halide perovskite transistors and compare their characteristics with those of mainstream semiconductor technologies. We examine the electronic and structural properties of halide perovskites, and discuss key perovskite transistors developed so far, focusing on defect chemistry and corresponding electrical properties. We also consider the challenges that exist in developing next-generation electronics and circuits with perovskites, and highlight potential research areas for future development. This Perspective explores the development of metal halide perovskite transistors, examining the properties of halide perovskites and key perovskite transistors, and considering the challenges that exist in developing next-generation electronics and circuits using these devices.

The number of nodes typically used in sensory networks is growing rapidly, leading to large amounts of redundant data being exchanged between sensory terminals and computing units. To efficiently process such large amounts of data, and decrease power consumption, it is necessary to develop approaches to computing that operate close to or inside sensory networks, and that can reduce the redundant data movement between sensing and processing units. Here we examine the concept of near-sensor and in-sensor computing in which computation tasks are moved partly to the sensory terminals. We classify functions into low-level and high-level processing, and discuss the implementation of near-sensor and in-sensor computing for different physical sensing systems. We also analyse the existing challenges in the field and provide possible solutions for the hardware implementation of integrated sensing and processing units using advanced manufacturing technologies. This Perspective examines the concept of near-senor and in-sensor computing in which computation tasks are moved partly to the sensory terminals, exploring the challenges facing the field and providing possible solutions for the hardware implementation of integrated sensing and processing units using advanced manufacturing technologies.

Operating across a wide temperature range is a priority for thermoelectric materials Thermoelectric technology can directly and reversibly convert heat to electrical energy. Although thermoelectric energy conversion will never be as efficient as a steam engine ( 1 ), improving thermoelectric performance can potentially make a technology commercially competitive. Thermoelectric conversion efficiency is estimated by the so-called dimensionless figure of merit, ZT = S 2 σ T /κ, where S , σ, T , and κ denote the Seebeck coefficient, electrical conductivity, working temperature, and thermal conductivity, respectfully . These parameters are strongly coupled, and improving the final ZT is challenging as a result. Strategies for boosting thermoelectric performance include nanostructuring, band engineering, nanomagnetic compositing, high-throughput screening, and others ( 2 ). Many of these strategies create a high ZT in a narrow range of temperatures, limiting the overall energy conversion. Finding materials with wider operating temperature ranges may require rethinking development strategies.

A memristor is a resistive device with an inherent memory. The theoretical concept of a memristor was connected to physically measured devices in 2008 and since then there has been rapid progress in the development of such devices, leading to a series of recent demonstrations of memristor-based neuromorphic hardware systems. Here, we evaluate the state of the art in memristor-based electronics and explore where the future of the field lies. We highlight three areas of potential technological impact: on-chip memory and storage, biologically inspired computing and general-purpose in-memory computing. We analyse the challenges, and possible solutions, associated with scaling the systems up for practical applications, and consider the benefits of scaling the devices down in terms of geometry and also in terms of obtaining fundamental control of the atomic-level dynamics. Finally, we discuss the ways we believe biology will continue to provide guiding principles for device innovation and system optimization in the field. This Perspective evaluates the state of the art in memristor-based electronics and explores the future development of such devices in on-chip memory, biologically inspired computing and general-purpose in-memory computing.

The use of organic, oxide and low-dimensional materials in field-effect transistors has now been studied for decades. However, properly reporting and comparing device performance remains challenging due to the interdependency of multiple device parameters. The interdisciplinarity of this research community has also led to a lack of consistent reporting and benchmarking guidelines. Here we propose guidelines for reporting and benchmarking key field-effect transistor parameters and performance metrics. We provide an example of this reporting and benchmarking process using a two-dimensional semiconductor field-effect transistor. Our guidelines should help promote an improved approach for assessing device performance in emerging field-effect transistors, helping the field to progress in a more consistent and meaningful way. This Perspective examines the challenges involved in assessing the operation and performance of field-effect transistors based on emerging materials, and provides guidelines for the consistent reporting and benchmarking of the devices.

Two-dimensional (2D) materials could potentially be used to develop advanced monolithic integrated circuits. However, despite impressive demonstrations of single devices and simple circuits—in some cases with performance superior to those of silicon-based circuits—reports on the fabrication of integrated circuits using 2D materials are limited and the creation of large-scale circuits remains in its infancy. Here we examine the development of integrated circuits based on 2D layered materials. We assess the most advanced circuits fabricated so far and explore the key challenges that need to be addressed to deliver highly scaled circuits. We also propose a roadmap for the future development of integrated circuits based on 2D layered materials. This Perspective examines the development of integrated circuits based on layered two-dimensional materials, exploring where they are likely to first find commercial use and considers the challenges than need to be addressed to create highly scaled circuits.

The discovery of ferroelectricity in oxides that are compatible with modern semiconductor manufacturing processes, such as hafnium oxide, has led to a re-emergence of the ferroelectric field-effect transistor in advanced microelectronics. A ferroelectric field-effect transistor combines a ferroelectric material with a semiconductor in a transistor structure. In doing so, it merges logic and memory functionalities at the single-device level, delivering some of the most pressing hardware-level demands for emerging computing paradigms. Here, we examine the potential of the ferroelectric field-effect transistor technologies in current embedded non-volatile memory applications and future in-memory, biomimetic and alternative computing models. We highlight the material- and device-level challenges involved in high-volume manufacturing in advanced technology nodes (≤10 nm), which are reminiscent of those encountered in the early days of high- K -metal-gate transistor development. We argue that the ferroelectric field-effect transistors can be a key hardware component in the future of computing, providing a new approach to electronics that we term ferroelectronics. This Perspective examines the use of ferroelectric field-effect transistor technologies in current embedded non-volatile memory applications and future in-memory, biomimetic and alternative computing models, arguing that the devices will be a key component in the development of data-centric computing.