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This article proposes and experimentally characterizes two implementations of a novel front-end circuit for three-wire connected resistive sensors with a wire-resistance compensation. The first implementation relies on two twin diodes, whereas the second on a switch; in both cases, those devices are non-remote (i.e., they are placed at the circuit end). The two circuit proposals have a square-wave input excitation so that a constant current with the two polarities is alternatively generated. Then, depending on that polarity, the current goes through either the sensor and the wire parasitic resistances or just the parasitic resistances. This generates a square-wave bipolar output signal whose average value, which is obtained by a low-pass filter, is proportional to the sensor resistance and only depends on the mismatch between two of the three wire resistances involved. Experimental tests applied to resistances related to a Pt100 thermal sensor show a remarkable linearity. For example, the switch-based front-end circuit offers a non-linearity error lower than 0.01% full-scale span, and this is practically insensitive to both the presence and the mismatch between the wire resistances.

In this article, a novel front-end circuit for remote two-wire resistive sensors that is insensitive to the wire resistances is proposed and experimentally characterized. The circuit relies on an OpAmp-based current source with a square-wave excitation, two twin diodes in the feedback path, and a low-pass filter at the output. Using such a circuit topology, the output is a DC voltage proportional to the sensor resistance and independent of the wire resistances. A prototype was built measuring resistances that correspond to a Pt100 thermal sensor and with different values of wire resistance. The experimental results show that the output voltage is almost insensitive to both the wire resistances and their mismatch, with a relative error (with respect to the case with null parasitic resistance) in the range of 0.01–0.03% Full-Scale Span (FSS). In addition, the proposed circuit shows a remarkable linearity (around 0.01% FSS), and again this is independent of the presence and also of the mismatch of the wire resistances.

Memristor-based neuromorphic computing offers a promising pathway for efficient in-memory processing. However, the scalability and reliability of such systems are severely compromised by parasitic resistances (including line and input resistances) in crossbar arrays, which cause significant IR-drop during vector–matrix multiplication (VMM). Existing research often suffers from high computational latency or relies on the precise extraction of parasitic parameters, which is impractical and computationally expensive for large-scale integration. To overcome these limitations, we propose a Parameter-Agnostic Adaptive Compensation (PAAC) method based on a distributed linear approximation model. By analyzing the circuit characteristics, we conquered the challenge of coupling between parasitic effects and output current, deriving a simplified linear relationship that requires no prior knowledge of specific resistance values. The PAAC method involves only a single-step pre-calibration experiment to determine a global compensation factor, achieving an ultra-low computational complexity during inference. We validated the method using a comprehensive two-stage strategy: board-level hardware experiments confirmed its feasibility by reducing current distortion from 71% to 2%, while extensive large-scale HSPICE simulations verified its scalability, restoring classification accuracy from 89% to 95%. This work provides a robust, low-overhead solution that eliminates the dependency on precise parameter modeling, facilitating the realization of large-scale, high-precision neuromorphic hardware.

This article presents the results of computer analysis of selected switching networks. In these analyses, the influence of selected parasitic components of electronic switches on the total and active power losses in these switches is considered. Analyses are performed using the SPICE software for two models of semiconductor switches: an ideal switch with RC parasitic components and the SPICE model of an IGBT. The influence of parasitic capacitances and resistances of these devices operating with the control signal of different parameters values on the total and active power dissipated in these switches is analyzed. On the basis of the obtained computations the average and peak-to-peak values of the junction temperature of electronic switches at the steady state are calculated using a compact thermal model. It is shown that parasitic elements visibly influence waveforms of the active and total power. It is proved that the simplified model using the total power in computations of the junction temperature makes it possible to obtain a high accuracy of computations only in a situation when the transistor operates with a resistive load. For an inductive load, such simplification can cause an unacceptably high computation error exceeding even 30%. Such an error is a result of big differences between the active and total powers during switching-on and switching-off processes.

Since the temperature of a photovoltaic (PV) module is not consistent as it was estimated at a standard test condition, the thermal stability of the solar cell parameters determines the temperature dependence of the PV module. Fill factor loss analysis of crystalline silicon solar cell is one of the most efficient methods to diagnose the dominant problem, accurately. In this study, the fill factor analysis method and the double-diode model of a solar cell was applied to analyze the effect of J01, J02, Rs, and Rsh on the fill factor in details. The temperature dependence of the parameters was compared through the passivated emitter rear cell (PERC) of the industrial scale solar cells. As a result of analysis, PERC cells showed different temperature dependence for the fill factor loss of the J01 and J02 as temperatures rose. In addition, we confirmed that fill factor loss from the J01 and J02 at elevated temperature depends on the initial state of the solar cells. The verification of the fill factor loss analysis was conducted by comparing to the fitting results of the injection dependent-carrier lifetime.

One advantage of a resistive sensor array (RSA) with shared rows (M) and shared columns (N) is the reduced number of wires from M × N + 1 to M + N which can greatly lessen the complexity and burden on wearable electronic systems. However, the drawback is the crosstalk current effect between adjacent elements, which will lead to high measurement error. Although several solutions have been reported, they mainly focus on RSAs with high resistance (≥100 Ω). There is a lack of research that addresses RSAs with resistor values below 100 Ω. Here, we introduce a new circuit design named the dynamic zero current method (DZCM) to further decrease the measurement error. From the low value RSA test with ideal resistors, the DZCM exhibits lower error than the zero potential method (ZPM). In the case of the error variation ratio of amplifier offset voltage, the DZCM has a 4%/mV (row) to 7%/mV (column) ratio, while the ZPM has an almost 25%/mV (row) to 45%/mV (column) ratio and it increases with array size.

Extensive research on fault diagnosis is essential to detect various faults that occur to different photovoltaic (PV) panels to keep PV systems operating at peak performance. Here, we present an impact analysis of potential induced degradation (PID) on the current–voltage (I-V) characteristics of crystalline silicon (c-Si) solar cells. The impact of parasitic resistances on solar cell performance is highlighted and linked to fault and degradation. Furthermore, a Simulink model for a single solar cell is proposed and used to estimate the I-V characteristics of a PID-affected PV cell based on experimental results attributes. The measured data show that the fill factor (FF) drops by approximately 13.7% from its initial value due to a decrease in shunt resistance (Rsh). Similarly, the simulation results find that the fill factor degraded by approximately 12% from its initial value. The slight increase in measured data could be due to series resistance effects which were assumed to be zero in the simulated data. This study links simulation and experimental work to confirm the I-V curve behavior of PID-affected PV cells, which could help to improve fault diagnosis methods.

During the characterization of the demonstration model of the Cryogenic AntiCoincidence (CryoAC) Detector (ACS-10), a current-dependent parasitic resistance was found in series with the TES network on board the detector. Analysis was possible because the resistance rises for currents above 11 μ A, and is therefore not observed at low bias excitation. A comparison of measurements of the TES across its Nb wiring at different temperatures suggested that the source of resistance was in the wiring and not in the TES network. After several analysis of the wiring fabrication steps, FIB-FE-SEM studies of film sections and tests of niobium film quality, we understood that the parasitic resistance was due to point contact in the Nb step coverage caused by film cracks. The fracture was due to the wall steepness and thickness of the films, since rapid step coverage is less mechanically stable and the stress on the films is proportional to the fourth power of the thickness. Therefore, all thicknesses in the wiring were reduced to the minimum optimum step coverage values and the first negative lithography parameters were optimized to reduce the wall film angle. The samples after this optimization showed no current-dependent series resistance to TES.

The radius of the coil, the number of turns of the windings, and the parasitic resistances of energy-storing elements affect the performances of wireless power transfer systems. We aimed to study the effects of coil parameters on a wireless power transfer system with the capacitor–capacitor–coupling coil (CCL)-based circuit using numerical simulations. The power transfer system topologies, including series–CCL (S–CCL), CCL–S, and CCL–CCL, were studied vis-à-vis coil parameters. The helical coil and the system topologies were modeled using MATLAB, and the performances of the topologies were examined in comparison to the series–series (S–S) topology. The variables used in the simulations included the radius and number of turns, the parasitic resistance that was merged in the impedance, and the reactance of energy-storing elements. Subsequently, the performances of the topologies were estimated by numerical simulations under several circumstances. The simulation results showed that the parasitic resistance of the coupling coil affects the performances of the topologies directly. The coupling coils with smaller geometries are beneficial to power transfer in the wireless power transfer system and may further contribute to miniaturization.

The decline in the bee colony strength due to high levels of  infestations necessitates the development of new control methods. This study evaluates the effectiveness of glycerin-oxalic acid strips and essential oils in managing . The experiment was conducted in 2022 at the experimental apiary in Debelec, part of the Institute of Animal Husbandry in Kostinbrod. Six experimental groups, each treated with a different preparation, were compared to a control group of untreated colonies. Treatments included Beevital Hiveclean (20 ml per colony), Varro Red (2 ml per frame), ammonium nitrate strips (1.3 mm), glycerin-oxalic acid strips (1.3 mm), and glycerin-oxalic acid strips of paper-cellulose (2.3 mm) or cellulose-cotton (2.3 mm). The control group remained untreated. The glycerin-oxalic acid strips made of cellulose and cotton (2.3 mm) showed the highest efficacy, reducing the mite infestation by 17.79% compared to the control. The glycerin-oxalic acid strips of paper-cellulose (2.3 mm) were also effective, achieving a 17.05% reduction in mite levels. These results provide valuable insights for beekeepers seeking alternative and sustainable methods for controlling infestations.