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2 result(s) for "phase shift reticles"
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Theory and Practicalities of Subwavelength Optical Lithography
Chapter 3 is a tutorial on optical lithography which encompasses the physics and theory of operation including issues associated with advanced processes, and corresponding solutions. It begins with a brief historical perspective, an introduction and simple imaging theory. Then it takes the reader through the challenges for the 100 nm nodes and beyond. This is followed by an overview of the significant process variations, the impact of low‐κ imaging on process sensitivities. A detailed discussion of low‐κ imaging follows, including its effect on depth of focus; exposure tolerance; mask error factor; sensitivity to aberrations; CD variation as a function of pitch; and corner rounding radius. The next topic covered is the state of the art resolution enhancement techniques which will extend the resolution of the current lithography down to a quarter of the wave‐length of the illumination used. This is followed by a discussion of the Physical Design Style Impact on RET and OPC Complexity. The chapter concludes with a look ahead into the future Lithography Technologies—the evolutionary as well as the revolutionary road maps.
Characterization of electrostatic discharge threshold voltage of phase-shift mask reticle
A reticle is a stencil used in lithography process for forming integrated circuit (IC) on silicon substrate. It consists of a thin (100 nm) coating of masking metallic patterned (features) with critical dimension (CD) of nanometers on a thicker quartz substrate. The features can be damaged by electrostatic discharge (ESD) when exposed to the environment electrostatic charge and caused deformed IC and eventually device difunctional. Semiconductor equipment materials industry (SEMI) standard established the allowable electrostatic charge on reticle based on the characterization of ESD threshold voltage on binary reticle. However, there is another type of reticle which is phase-shift mask (PSM), has not been characterized for its ESD threshold voltage. A direct current (DC) voltage is applied directly to the structures with CD of 80 nm, 110 nm, and 160 nm. The surface current is recorded at all levels of stress from 1 to 100 V. The current–voltage (IV) curve and physical inspection results for each cell are then reviewed and classified. The results yielded which no electric field induced migration (EFM) defect and breakdown voltage occurred at any of the structures. The cathode’s metal work function has been identified as the factor that influences the PSM reticle ESD threshold voltage.