Explore the vast range of titles available.

Two-dimensional (2D) materials are promising candidates for neuromorphic computing owing to their atomically thin structure and tunable optoelectronic properties. However, achieving controllable synaptic behavior via defect engineering remains challenging. In this work, we introduce X-ray irradiation as a facile strategy to modulate defect states and enhance synaptic plasticity in WSe2-based optoelectronic synapses. The introduction of selenium vacancies via irradiation significantly improved both electrical and optical responses. Under electrical stimulation, short-term potentiation (STP) exhibited enhanced excitatory postsynaptic current (EPSC) retention exceeding 10%, measured 20 s after the stimulation peak. In addition, the nonlinearity of long-term potentiation (LTP) and long-term depression (LTD) was reduced, and the signal decay time was extended. Under optical stimulation, STP showed more than 4% improvement in EPSC retention at 16 s with similar relaxation enhancement. These effects are attributed to irradiation-induced defect states that facilitate charge carrier trapping and extend signal persistence. Moreover, the reduced nonlinearity in synaptic weight modulation improved the recognition accuracy of handwritten digits in a CrossSim-simulated MNIST task, increasing from 88.5% to 93.75%. This study demonstrates that X-ray irradiation is an effective method for modulating synaptic weights in 2D materials, offering a universal strategy for defect engineering in neuromorphic device applications.

Owing to the 4th Industrial Revolution, the amount of unstructured data, such as voice and video data, is rapidly increasing. Brain-inspired neuromorphic computing is a new computing method that can efficiently and parallelly process rapidly increasing data. Among artificial neural networks that mimic the structure of the brain, the spiking neural network (SNN) is a network that imitates the information-processing method of biological neural networks. Recently, memristors have attracted attention as synaptic devices for neuromorphic computing systems. Among them, the ferroelectric doped-HfO2-based ferroelectric tunnel junction (FTJ) is considered as a strong candidate for synaptic devices due to its advantages, such as complementary metal–oxide–semiconductor device/process compatibility, a simple two-terminal structure, and low power consumption. However, research on the spiking operations of FTJ devices for SNN applications is lacking. In this study, the implementation of long-term depression and potentiation as the spike timing-dependent plasticity (STDP) rule in the FTJ device was successful. Based on the measured data, a CrossSim simulator was used to simulate the classification of handwriting images. With a high accuracy of 95.79% for the Mixed National Institute of Standards and Technology (MNIST) dataset, the simulation results demonstrate that our device is capable of differentiating between handwritten images. This suggests that our FTJ device can be used as a synaptic device for implementing an SNN.

A well‐posed physics‐based compact model for a three‐terminal silicon–oxide–nitride–oxide–silicon (SONOS) synaptic circuit element is presented for use by neuromorphic circuit/system engineers. Based on technology computer aided design (TCAD) simulations of a SONOS device, the model contains a nonvolatile memristor with the state variable QM representing the memristor charge under the gate of the three‐terminal element. By incorporating the exponential dependence of the memristance on QM and the applied bias V for the gate, the compact model agrees quantitatively with the results from TCAD simulations as well as experimental measurements for the drain current. The compact model is implemented through VerilogA in the circuit simulation package Cadence Spectre and reproduces the experimental training behavior for the source–drain conductance of a SONOS device after applying writing pulses ranging from −12 V to +11 V, with an accuracy higher than 90%. A well‐posed physics‐based compact model of a three‐terminal silicon–oxide–nitride–oxide–silicon (SONOS) synaptic circuit element is presented for neuromorphic circuit designs. Based on technology‐computer‐aided design (TCAD) simulations, a fundamental compact model requiring a memristor was formulated. The model was verified by simulation in Cadence Spectre with VerilogA, which yielded quantitative agreement to experimentally measured channel currents.

In recent years, deep neural networks (DNN) have demonstrated significant business impact in large scale analysis and classification tasks such as speech recognition, visual object detection, pattern extraction, etc. Training of large DNNs, however, is universally considered as time consuming and computationally intensive task that demands datacenter-scale computational resources recruited for many days. Here we propose a concept of resistive processing unit (RPU) devices that can potentially accelerate DNN training by orders of magnitude while using much less power. The proposed RPU device can store and update the weight values locally thus minimizing data movement during training and allowing to fully exploit the locality and the parallelism of the training algorithm. We evaluate the effect of various RPU device features/non-idealities and system parameters on performance in order to derive the device and system level specifications for implementation of an accelerator chip for DNN training in a realistic CMOS-compatible technology. For large DNNs with about 1 billion weights this massively parallel RPU architecture can achieve acceleration factors of 30, 000 × compared to state-of-the-art microprocessors while providing power efficiency of 84, 000 GigaOps∕s∕W. Problems that currently require days of training on a datacenter-size cluster with thousands of machines can be addressed within hours on a single RPU accelerator. A system consisting of a cluster of RPU accelerators will be able to tackle Big Data problems with trillions of parameters that is impossible to address today like, for example, natural speech recognition and translation between all world languages, real-time analytics on large streams of business and scientific data, integration, and analysis of multimodal sensory data flows from a massive number of IoT (Internet of Things) sensors.

Neuromorphic computing systems can perform memory and computing tasks in parallel on artificial synaptic devices through simulating synaptic functions, which is promising for breaking the conventional von Neumann bottlenecks at hardware level. Artificial optoelectronic synapses enable the synergistic coupling between optical and electrical signals in synaptic modulation, which opens up an innovative path for effective neuromorphic systems. With the advantages of high mobility, optical transparency, ultrawideband tunability, and environmental stability, graphene has attracted tremendous interest for electronic and optoelectronic applications. Recent progress highlights the significance of implementing graphene into artificial synaptic devices. Herein, to better understand the potential of graphene-based synaptic devices, the fabrication technologies of graphene are first presented. Then, the roles of graphene in various synaptic devices are demonstrated. Furthermore, their typical optoelectronic applications in neuromorphic systems are reviewed. Finally, outlooks for development of synaptic devices based on graphene are proposed. This review will provide a comprehensive understanding of graphene fabrication technologies and graphene-based synaptic device for optoelectronic applications, also present an outlook for development of graphene-based synaptic device in future neuromorphic systems. Fabrication technologies for graphene, including synthesis, transfer and patterning are discussed. The roles of graphene in synaptic devices (memristors and synaptic transistors) are reviewed. Recent emerging optoelectronic applications of graphene-based synaptic devices are introduced. Challenges and future perspectives for graphene-based synaptic device in optoelectronic neuromorphic application are outlined.

A neuromorphic system is composed of hardware-based artificial neurons and synaptic devices, designed to improve the efficiency of neural computations inspired by energy-efficient and parallel operations of the biological nervous system. A synaptic device-based array can compute vector–matrix multiplication (VMM) with given input voltage signals, as a non-volatile memory device stores the weight information of the neural network in the form of conductance or capacitance. However, unlike software-based neural networks, the neuromorphic system unavoidably exhibits non-ideal characteristics that can have an adverse impact on overall system performance. In this study, the characteristics required for synaptic devices and their importance are discussed, depending on the targeted application. We categorize synaptic devices into two types: conductance-based and capacitance-based, and thoroughly explore the operations and characteristics of each device. The array structure according to the device structure and the VMM operation mechanism of each structure are analyzed, including recent advances in array-level implementation of synaptic devices. Furthermore, we reviewed studies to minimize the effect of hardware non-idealities, which degrades the performance of hardware neural networks. These studies introduce techniques in hardware and signal engineering, as well as software-hardware co-optimization, to address these non-idealities through compensation approaches.

A novel operation scheme is proposed for high-density and highly robust neuromorphic computing based on NAND flash memory architecture. Analogue input is represented with time-encoded input pulse by pulse width modulation (PWM) circuit and 4-bit synaptic weight is represented with adjustable conductance of NAND cells. PWM scheme for analogue input value and proposed operation scheme are fully compatible with existing NAND flash memory architecture to implement neuromorphic system without additional change of memory architecture. Saturated current-voltage characteristic of NAND cells eliminates the effect of serial resistance of pass cells in a synaptic string and IR drop of metal wire resistance. Multiply-accumulate (MAC) operation of 4-bit weight and width-modulated input can be accomplished in a single input pulse eliminating the additional logic operation. In addition, effect of quantization training on the inference accuracy is investigated compared to post-training quantization with 4-bit weight. Finally, the low-variance conductance distribution of NAND cells obtained by read-verify-write (RVW) scheme achieves satisfying accuracy of 98.14% and 89.6% for the MNIST and CIFAR10 datasets, respectively.

Neuromorphic computing can potentially solve the von Neumann bottleneck of current mainstream computing because it excels at self‐adaptive learning and highly parallel computing and consumes much less energy. Synaptic devices that mimic biological synapses are critical building blocks for neuromorphic computing. Inspired by recent progress in optogenetics and visual sensing, light has been increasingly incorporated into synaptic devices. This paves the way to optoelectronic synaptic devices with a series of advantages such as wide bandwidth, negligible resistance–capacitance (RC) delay and power loss, and global regulation of multiple synaptic devices. Herein, the basic functionalities of synaptic devices are introduced. All kinds of optoelectronic synaptic devices are then discussed by categorizing them into optically stimulated synaptic devices, optically assisted synaptic devices, and synaptic devices with optical output. Existing practical scenarios for the application of optoelectronic synaptic devices are also presented. Finally, perspectives on the development of optoelectronic synaptic devices in the future are outlined. Inspired by recent progress in optogenetics and visual sensing, optoelectronic synaptic devices having the advantages of wide bandwidth, facile global regulation, and negligible resistance–capacitance (RC) delay and power loss are intensely studied. Herein, optoelectronic synaptic devices with optical stimulation, optical assistance, or optical output are introduced. Practical scenarios for the application of optoelectronic synaptic devices and perspectives on the future development are presented.

With the merits of non-contact, highly efficient, and parallel computing, optoelectronic synaptic devices combining sensing and memory in a single unit are promising for constructing neuromorphic computing and artificial visual chip. Based on this, a N:ZnO/MoS 2 -heterostructured flexible optoelectronic synaptic device is developed in this work, and its capability in mimicking the synaptic behaviors is systemically investigated under the electrical and light signals. Versatile synaptic functions, including synaptic plasticity, long-term/short-term memory, and learning-forgetting-relearning property, have been achieved in this synaptic device. Further, an artificial visual memory system integrating sense and memory is emulated with the device array, and the visual memory behavior can be regulated by varying the light parameters. Moreover, the optoelectronic co-modulation behavior is verified by applying mixed electric and light signals to the array. In detail, a transient recovery property is discovered when the electric signals are applied in synergy during the decay of the light response, of which property facilitates the development of robust artificial visual systems. Furthermore, by superimposing electrical signals during the light response process, a differentiated response of the array is achieved, which can be used as a proof of concept for the color perception of the artificial visual system.

HighlightsSynaptic devices that mimic synaptic functions are discussed by categorizing them into electrically stimulated, optically stimulated, and photoelectric synergetic synaptic devices based on stimulation of electrical and optical signals.The working mechanisms, progress, and application scenarios of synaptic devices based on electrical and optical signals are compared and analyzed.The performances and future development of various synaptic devices that could be significant for building efficient neuromorphic systems are prospected.Neuromorphic computing simulates the operation of biological brain function for information processing and can potentially solve the bottleneck of the von Neumann architecture. This computing is realized based on memristive hardware neural networks in which synaptic devices that mimic biological synapses of the brain are the primary units. Mimicking synaptic functions with these devices is critical in neuromorphic systems. In the last decade, electrical and optical signals have been incorporated into the synaptic devices and promoted the simulation of various synaptic functions. In this review, these devices are discussed by categorizing them into electrically stimulated, optically stimulated, and photoelectric synergetic synaptic devices based on stimulation of electrical and optical signals. The working mechanisms of the devices are analyzed in detail. This is followed by a discussion of the progress in mimicking synaptic functions. In addition, existing application scenarios of various synaptic devices are outlined. Furthermore, the performances and future development of the synaptic devices that could be significant for building efficient neuromorphic systems are prospected.