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Neutral point voltage balance and surge voltage reduction for three-level converters in PMSM starting process based on narrow pulse suppression
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Neutral point voltage balance and surge voltage reduction for three-level converters in PMSM starting process based on narrow pulse suppression
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Journal Article
Neutral point voltage balance and surge voltage reduction for three-level converters in PMSM starting process based on narrow pulse suppression
2022
Overview
This paper describes a narrow pulse suppression method that is called hybrid modulation strategy for T-type neutral point clamped (TNPC) three-level converters. Conventional VSVPWM does not function well in high-frequency TNPC converters due to the problem of narrow pulses during the permanent magnet synchronous motor (PMSM) starting process. The narrow pulse phenomenon occurs when the ON/OFF state time of the driving pulse is less than the minimum time required by the power devices. The narrow pulse threatens the safe operation of power devices and results in a high surge voltage and electromagnetic interference. In addition, neutral point voltage unbalance is caused by the narrow pulse in motor starting process. The effects of the narrow pulse on the surge voltage and the neutral point voltage are both discussed in this paper. The minimum pulse width function is designed to define the relationship between the gate drive signal and the modulation strategy. The switch pattern limited region of the virtual space vector modulation strategy is analyzed by the minimum pulse width function under both low and high modulation indexes. A resistance inductance load and a PMSM drive system test setup based on a TNPC three-level converter are both established to verify the analysis and effectiveness of the proposed method.
Publisher
Springer Nature Singapore,Springer Nature B.V
