Journal Article

Voltage Flip Efficiency Enhancement for Piezo Energy Harvesting

Jamshidpour, Ehsan, Frick, Vincent, Wassouf, Liana

2021

Overview

In this paper, we analyze the effect of an enhanced voltage flip technique on the power performance of a piezoelectric energy harvester. The enhanced voltage flip principle is based on a synchronized-switch-based architecture, and is referred to as FAR (Full Active Rectifier). It uses a tiny amount of the stored charge to boost the voltage flip. This work aims to demonstrate that, beside the enhanced flip efficiency, the FAR also contributes to improve the power efficiency of the harvester, especially under changing load constraint. Therefore, the paper proposes a thorough comparison between the FAR and its conventional counterpart, the Switch-only technique. The FAR is easy to implement and does not require any external inductor or capacitor. It only needs a reduced set of switches, an active diode and a simple control sequence, and can thus be implemented on a fully integrated circuit. The FAR can be used as a standalone voltage flip solution or in addition to further boost the flip efficiency in a state-of-the-art architecture such as SSHC for example. Tests were performed on a 0.35-µm process CMOS prototype IC. Experimental results revealed that the FAR extracts 19.1μW from an off-the-shelf piezoelectric transducer when the output voltage is regulated at 1 V with 1 V open-circuit voltage and delivers up to 20% more power than the conventional Switch-only technique under load constraint. It also shows over 11× power efficiency improvement compared to a conventional diode-based full bridge rectifier.

• Publisher: MDPI AG,MDPI
• Subject: CMOS / Diodes / Efficiency / Electronics / Energy / Energy harvesting / Engineering Sciences / Integrated circuits / Load / Open circuit voltage / Piezoelectric transducers / Power efficiency / Rectifiers / Switches