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Optimization-Based Capacitor Balancing Method with Customizable Switching Reduction for CHB Converters
by
Galván, Eduardo
, Carrasco, Juan M.
, Galván, Luis
, Gómez, Pablo J.
in
capacitor balance
/ cascaded H-bridge converter (CHB)
/ common-mode voltage
/ commutations reduction
/ Methods
/ multilevel converter
/ optimal control
/ Optimization
2022
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Optimization-Based Capacitor Balancing Method with Customizable Switching Reduction for CHB Converters
by
Galván, Eduardo
, Carrasco, Juan M.
, Galván, Luis
, Gómez, Pablo J.
in
capacitor balance
/ cascaded H-bridge converter (CHB)
/ common-mode voltage
/ commutations reduction
/ Methods
/ multilevel converter
/ optimal control
/ Optimization
2022
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Do you wish to request the book?
Optimization-Based Capacitor Balancing Method with Customizable Switching Reduction for CHB Converters
by
Galván, Eduardo
, Carrasco, Juan M.
, Galván, Luis
, Gómez, Pablo J.
in
capacitor balance
/ cascaded H-bridge converter (CHB)
/ common-mode voltage
/ commutations reduction
/ Methods
/ multilevel converter
/ optimal control
/ Optimization
2022
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Optimization-Based Capacitor Balancing Method with Customizable Switching Reduction for CHB Converters
Journal Article
Optimization-Based Capacitor Balancing Method with Customizable Switching Reduction for CHB Converters
2022
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Overview
This paper presents a method for switching reduction in cascaded H-bridge converters. Given the wide applicability of this topology, it would be especially desirable to increase its efficiency with switching losses reduction techniques. Since this type of converter requires voltage balancing methods, several modulation methods consider the possibility of combining the balancing and switching reduction goals together. In this paper, a previously disclosed optimization-based balance method was modified further to consider the switching losses in its objective function. Each commutation was penalized in proportion to the phase current and the module voltage, thus avoiding commutations that would produce the most losses but tolerating low-losses commutations. The structure of the original method was maintained so that the algorithm could be applied with minimal change. The results show that it is possible to reduce the switching up to 14% without any noticeable drawback and up to 22% at the cost of a greater DC-link ripple. It is also possible to selectively reduce the effective switching frequency of only some modules, making it significantly low. This extends the adaptability of the converter, possibly allowing hybrid converters with modules of different transistor technologies.
Publisher
MDPI AG
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