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Modular architecture for fully non-blocking silicon photonic switch fabric
by
Rumley, Sébastien
, Calhoun, David M.
, Liu, Yang
, Hochberg, Michael
, Bergman, Keren
, Nikolova, Dessislava
, Baehr-Jones, Tom
, Novack, Ari
in
639/166/987
/ 639/624
/ 639/624/400/1021
/ 639/925/927/1021
/ Architecture
/ Counting
/ Engineering
/ Fabrics
/ Feasibility
/ Photonics
/ Ports
/ Silicon
/ Switches
2017
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Modular architecture for fully non-blocking silicon photonic switch fabric
by
Rumley, Sébastien
, Calhoun, David M.
, Liu, Yang
, Hochberg, Michael
, Bergman, Keren
, Nikolova, Dessislava
, Baehr-Jones, Tom
, Novack, Ari
in
639/166/987
/ 639/624
/ 639/624/400/1021
/ 639/925/927/1021
/ Architecture
/ Counting
/ Engineering
/ Fabrics
/ Feasibility
/ Photonics
/ Ports
/ Silicon
/ Switches
2017
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Modular architecture for fully non-blocking silicon photonic switch fabric
by
Rumley, Sébastien
, Calhoun, David M.
, Liu, Yang
, Hochberg, Michael
, Bergman, Keren
, Nikolova, Dessislava
, Baehr-Jones, Tom
, Novack, Ari
in
639/166/987
/ 639/624
/ 639/624/400/1021
/ 639/925/927/1021
/ Architecture
/ Counting
/ Engineering
/ Fabrics
/ Feasibility
/ Photonics
/ Ports
/ Silicon
/ Switches
2017
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Modular architecture for fully non-blocking silicon photonic switch fabric
Journal Article
Modular architecture for fully non-blocking silicon photonic switch fabric
2017
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Overview
Integrated photonics offers the possibility of compact, low energy, bandwidth-dense interconnects for large port count spatial optical switches, facilitating flexible and energy efficient data movement in future data communications systems. To achieve widespread adoption, intimate integration with electronics has to be possible, requiring switch design using standard microelectronic foundry processes and available devices. We report on the feasibility of a switch fabric comprised of ubiquitous silicon photonic building blocks, opening the possibility to combine technologies, and materials towards a new path for switch fabric design. Rather than focus on integrating all devices on a single silicon chip die to achieve large port count optical switching, this work shifts the focus towards innovative packaging and integration schemes. In this work, we demonstrate 1×8 and 8×1 microring-based silicon photonic switch building blocks with software control, providing the feasibility of a full 8×8 architecture composed of silicon photonic building blocks. The proposed switch is fully non-blocking, has path-independent insertion loss, low crosstalk, and is straightforward to control. We further analyze this architecture and compare it with other common switching architectures for varying underlying technologies and radices, showing that the proposed architecture favorably scales to very large port counts when considering both crosstalk and architectural footprint. Separating a switch fabric into functional building blocks via multiple photonic integrated circuits offers the advantage of piece-wise manufacturing, packaging, and assembly, potentially reducing the number of optical I/O and electrical contacts on a single die.
Photonic switches: No roadblocks on the ring route
Ring-shaped silicon photonic switches offer compact geometries at the micron-scale for superior on-chip integration and scalability. The resonant nature of these devices allows for excellent noise isolation down to a single wavelength. Integrated circuits with many ‘microrings’ have been developed recently. Dessislava Nikolova, David M. Calhoun, and researchers at Columbia University and Coriant ATG propose that coupling several such ‘microring integrated circuits’ into a combination of multiplexing and demultiplexing arrays could yield ultrafast optical switches. In the team’s architecture, each combination of two circuits filters a single optical wavelength. Keeping only two microrings per port on resonance through voltage adjustments enables scalable, port-to-port communication without detrimental crosstalk effects. A prototype 8×8 switching device featuring microring circuits with multiplexing and demultiplexing functionality demonstrates the feasibility of the team’s approach and its compatibility with existing semiconductor manufacturing processes.
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