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45 result(s) for "Dilillo, L."
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Intra-Cell Defects Diagnosis
The diagnosis is the process of isolating possible sources of observed failures in a defective circuit. Today, manufacturing defects appear not only in the cell interconnection, but also inside the cell itself (intra-cell defect). State of the art diagnosis approaches can identify the defect location at gate level (i.e., one or more standard cells and/or inter-connections can be provided as possible defect location). Some approaches have been developed to target the intra-cell defects. In this paper, we propose an intra-cell diagnosis method based on the “Effect-Cause” paradigm aiming at locating the root cause of the observed failures inside a logic cell. It is based on the Critical Path Tracing (CPT) here applied at transistor level. The main characteristic of our approach is that it exploits the analysis of the faulty behavior induced by the actual defect. In other word, we locate the defect by simply analyzing the effect induced by the defect itself. The advantage is the fact that we are defect independent (i.e., we do not have to explicitly consider the type and the size of the defect). Moreover, since the complexity of a single cell in terms of transistor number is low, the proposed intra-cell diagnosis approach requires a negligible computational time. The efficiency of the proposed approach has been evaluated by means of experimental results carried out on both simulations-based and industrial silicon data case studies.
A New Hybrid Fault-Tolerant Architecture for Digital CMOS Circuits and Systems
This paper presents a new hybrid fault-tolerant architecture for robustness improvement of digital CMOS circuits and systems. It targets all kinds of errors in combinational part of logic circuits and thus, can be combined with advanced SEU protection techniques for sequential elements while reducing the power consumption. The proposed architecture combines different types of redundancies: information redundancy for error detection, temporal redundancy for soft error correction and hardware redundancy for hard error correction. Moreover, it uses a pseudo-dynamic comparator for SET and timing errors detection. Besides, the proposed method also aims to reduce power consumption of fault-tolerant architectures while keeping a comparable area overhead compared to existing solutions. Results on the largest ISCAS’85 and ITC’99 benchmark circuits show that our approach has an area cost of about 3 % to 6 % with a power consumption saving of about 33 % compared to TMR architectures.
On the Test and Mitigation of Malfunctions in Low-Power SRAMs
In low-power SRAMs, power gating mechanisms are commonly used to reduce static power consumption. When the SRAM is not accessed for a long period, such mechanisms allow shutting off one or more memory blocks (core-cell array, address decoder, I/O logic, etc.), thus reducing leakage currents. In order to guarantee static power reduction in low-power SRAMs, reliable operation of power gating mechanisms must be ensured by adequate test techniques. In this paper, we first present a detailed analysis based on electrical simulations to identify faulty behaviors caused by realistic defects that may affect power gating mechanisms embedded in low-power SRAMs. Based on this analysis, we present an efficient test solution targeting detection of observed faulty behaviors. As a final contribution, we propose novel techniques to mitigate the impact of studied defects, once detected by test methods, therefore providing significant yield improvement.
Analysis and Fault Modeling of Actual Resistive Defects in ATMEL eFlash Memories
The embedded Flash (eFlash) technology can be subject to defects creating functional faults. In this paper, we first generalize the electrical model of the ATMEL TSTAC™ eFlash memory technology proposed in [ 10 ]. The model is composed of two layers: a functional layer representing the Floating Gate (FG) and a programming layer able to determine the channel voltage level controlling the Fowler-Nordheim tunneling effect. The proposed model is validated by means of simulations and comparisons with ATMEL silicon data. Then, we present a complete analysis of actual resistive defects (open and short) that may affect the ATMEL TSTAC™ eFlash array by considering the proposed model on a hypothetical 4 × 4 array. This analysis highlights the interest of the proposed model to provide a realistic set of fault models that has to be tested, thus enhancing existing solutions for TSTAC™ eFlash testing.
Analysis and Fault Modeling of Actual Resistive Defects in ATMEL TSTACTM) eFlash Memories
The embedded Flash (eFlash) technology can be subject to defects creating functional faults. In this paper, we first generalize the electrical model of the ATMEL TSTAC(TM) eFlash memory technology proposed in [10]. The model is composed of two layers: a functional layer representing the Floating Gate (FG) and a programming layer able to determine the channel voltage level controlling the Fowler-Nordheim tunneling effect. The proposed model is validated by means of simulations and comparisons with ATMEL silicon data. Then, we present a complete analysis of actual resistive defects (open and short) that may affect the ATMEL TSTAC(TM) eFlash array by considering the proposed model on a hypothetical 4×4 array. This analysis highlights the interest of the proposed model to provide a realistic set of fault models that has to be tested, thus enhancing existing solutions for TSTAC(TM) eFlash testing.[PUBLICATION ABSTRACT]
Efficient March Test Procedure for Dynamic Read Destructive Fault Detection in SRAM Memories
This paper presents an analysis of dynamic faults in core-cell of SRAM memories. These faults may appear as the consequence of resistive-open defects that appear more and more frequently in VDSM technologies. In particular, the study concentrates on those defects that generate dynamic Read Destructive Faults, dRDFs. In this paper, we demonstrate that read or write operations on a cell involve a stress on the other cells of the same word line. This stress, called Read Equivalent Stress (RES), has the same effect than a read operation. On this basis, we propose to modify the well known March C-, which does not detect dRDFs, into a new version able to detect them. This is obtained by changing its addressing order with the purpose of producing the maximal number of RES. This modification does not change the complexity of the algorithm and its capability to detect the former target faults.
Analysis of Dynamic Faults in Embedded-SRAMs: Implications for Memory Test
This paper presents the results of resistive-open defect insertion in different locations of Infineon 0.13 μm embedded-SRAM with the main purpose of verifying the presence of dynamic faults. This study is based on the injection of resistive defects as their presence in VDSM technologies is more and more frequent. Electrical simulations have been performed to evaluate the effects of those defects in terms of detected functional faults. Read destructive, deceptive read destructive and dynamic read destructive faults have been reproduced and accurately characterized. The dependence of the fault detection has been put in relation with memory operating conditions, resistance value and clock cycle, and the importance of at speed testing for dynamic fault models has been pointed out. Finally resistive Address Decoder Open Faults (ADOF) have been simulated and the conditions that maximize the fault detection have been discussed as well as the resulting implications for memory test.[PUBLICATION ABSTRACT]
Ultra-High Mass Resolution MALDI Imaging Mass Spectrometry of Proteins and Metabolites in a Mouse Model of Glioblastoma
MALDI mass spectrometry imaging is able to simultaneously determine the spatial distribution of hundreds of molecules directly from tissue sections, without labeling and without prior knowledge. Ultra-high mass resolution measurements based on Fourier-transform mass spectrometry have been utilized to resolve isobaric lipids, metabolites and tryptic peptides. Here we demonstrate the potential of 15T MALDI-FTICR MSI for molecular pathology in a mouse model of high-grade glioma. The high mass accuracy and resolving power of high field FTICR MSI enabled tumor specific proteoforms, and tumor-specific proteins with overlapping and isobaric isotopic distributions to be clearly resolved. The protein ions detected by MALDI MSI were assigned to proteins identified by region-specific microproteomics (0.8 mm 2 regions isolated using laser capture microdissection) on the basis of exact mass and isotopic distribution. These label free quantitative experiments also confirmed the protein expression changes observed by MALDI MSI and revealed changes in key metabolic proteins, which were supported by in-situ metabolite MALDI MSI.
Chronic lymphocytic leukemia and regulatory B cells share IL-10 competence and immunosuppressive function
Chronic lymphocytic leukemia (CLL) can be immunosuppressive in humans and mice, and CLL cells share multiple phenotypic markers with regulatory B cells that are competent to produce interleukin (IL)-10 (B10 cells). To identify functional links between CLL cells and regulatory B10 cells, the phenotypes and abilities of leukemia cells from 93 patients with overt CLL to express IL-10 were assessed. CD5 + CLL cells purified from 90% of the patients were IL-10-competent and secreted IL-10 following appropriate ex vivo stimulation. Serum IL-10 levels were also significantly elevated in CLL patients. IL-10-competent cell frequencies were higher among CLLs with IgV H mutations, and correlated positively with TCL1 expression. In the TCL1-transgenic (TCL1-Tg) mouse model of CLL, IL-10-competent B cells with the cell surface phenotype of B10 cells expanded significantly with age, preceding the development of overt, CLL-like leukemia. Malignant CLL cells in TCL1-Tg mice also shared immunoregulatory functions with mouse and human B10 cells. Serum IL-10 levels varied in TCL1-Tg mice, but in vivo low-dose lipopolysaccharide treatment induced IL-10 expression in CLL cells and high levels of serum IL-10. Thus, malignant IL-10-competent CLL cells exhibit regulatory functions comparable to normal B10 cells that may contribute to the immunosuppression observed in patients and TCL1-Tg mice.
Development and Validation of a Brief Version of the Difficulties in Emotion Regulation Scale: The DERS-16
The Difficulties in Emotion Regulation Scale (DERS) is a widely-used, theoretically-driven, and psychometrically-sound self-report measure of emotion regulation difficulties. However, at 36-items, the DERS may be challenging to administer in some situations or settings (e.g., in the course of patient care or large-scale epidemiological studies). Consequently, there is a need for a briefer version of the DERS. The goal of the present studies was to develop and evaluate a 16-item version of the DERS – the DERS-16. The reliability and validity of the DERS-16 were examined in a clinical sample (N = 96) and two large community samples (Ns = 102 and 482). The validity of the DERS-16 was evaluated comparing the relative strength of the association of the two versions of the DERS with measures of emotion regulation and related constructs, psychopathology, and clinically-relevant behaviors theorized to stem from emotion regulation deficits. Results demonstrate that the DERS-16 has retained excellent internal consistency, good test-retest reliability, and good convergent and discriminant validity. Further, the DERS-16 showed minimal differences in its convergent and discriminant validity with relevant measures when compared to the original DERS. In conclusion, the DERS-16 offers a valid and brief method for the assessment of overall emotion regulation difficulties.