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This paper reviews the application of Hall position sensors in control and position estimation of permanent magnet synchronous motors (PMSMs). Accurate rotor position and motor speed data are essential for the high-efficiency control of PMSMs in modern industry. Rotor position and motor speed can be measured by mechanical position sensors, which are costly and less reliable, or by rotor position observers, which are sensitive to system models and changes in motor parameters. This paper examines the benefits, limitations, challenges, and uses of low-resolution Hall position sensors in PMSM drives, presenting them as a cost-effective solution for achieving a balance between performance and expense. In addition, the paper discusses recent solutions to issues related to misplaced Hall position sensors and fault-tolerant control algorithms, and gives an outlook to future developments in this area.

This paper investigates the effects of high-frequency switching and a high fundamental frequency on the parameters and efficiency of a high-speed permanent magnet synchronous machine (PMSM) drive. We discuss the design and modeling of the PMSM, taking into account these high-frequency effects. The impact of high frequencies is analyzed across three different inverters (IGBT, Fast IGBT, and SiC-MOSFET) and the motor, and we employ theoretical analysis, computer simulations, and experimental tests for validation. Our goal is to enhance our understanding of how these high-frequency factors affect the performance of the motor drive.

The growing utilisation of non-linear loads poses significant challenges to power quality in electrical grids. Non-linear loads, such as three-phase diode rectifiers, produce substantial harmonics, necessitating effective control methods to mitigate harmonic distortions. The implementation of active power filters (APF) offers significant potential for enhancing harmonic compensation performance. Accordingly, this research introduces a non-singular fast terminal sliding mode controller (NFTSMC) integrated with proportional multi-resonant (PMR) based control for a three-phase APF. The primary objective of this approach is to achieve rapid and precise tracking of reference currents while simultaneously injecting the desired currents into the electrical grid. Furthermore, to reduce harmonics generated by high-switching-frequency inverters, incorporating an LCL filter with an active damping strategy is essential. The PMR controller generates capacitor voltage references, ensuring zero steady-state error in the grid current and facilitating the implementation of the active damping method. Simulation results demonstrate the ordinary sliding mode controller (SMC) by achieving significantly lower total harmonic distortion (THD). Additionally, it exhibits superior dynamic response and robustness presence of uncertainties.

In this paper, a comparative analysis has been presented of two equivalent circuits of non-isolated buck/buck-boost converters under synchronous control, used in a stand-alone Photovoltaic-battery-load system. The first circuit consists of two cascaded buck and buck-boost classical converters with two controllable switches. The buck converter is used to extract the maximum power of the Photovoltaic source, and the buck-boost converter is applied for the output voltage level control. The second circuit consists of a proposed converter with a single controllable switch. In both cases, the switching frequency is used to track the maximum power point and the duty ratio controls the output voltage level. Selected simulation results and experimental tests confirm that the two conversion circuits have identical behavior under synchronous control. This study shows that the single switch converter has a lower size and cost, but it is limited in the possible control strategy.

This study investigates the nonlinearities in three-phase inverters for SiC-based systems and compares their performance to IGBT-based systems. An analytical model of inverter voltage distortion is developed, which accounts not only for dead time (td), switching delay time, switching frequency (fs), and voltage drops of power devices, but also for output parasitic capacitance (Cout). Experimental tests validate the model, which provides a more accurate estimate of the inverter’s output phase voltage distortion. The power device characteristics are obtained from datasheets, while Cout is determined through experimentation. Three-phase inverters with varying switching frequencies, fundamental frequencies, and dead-time values are used in simulations and experiments to determine the influence of nonlinearity on phase voltage deviation and current distortion. The results show that, due to SiC devices’ faster switching time, the phase voltage deviation and phase current distortion are lower in SiC-based inverters than in IGBT-based ones for high-frequency applications, as the dead time can be reduced.

This paper presents a new online method based on low frequency signal injection to estimate the stator resistance of a Wound Rotor Synchronous Machine (WRSM). The proposed estimator provides a parameter-free method for estimating the stator resistance, in which there is no need to know the values of the parameters of the machine model, such as the stator and rotor inductances or the rotor flux linkage. In this method, a low frequency sinusoidal current is injected in the d axis of the stator current to produce a sinusoidal flux in the stator. In this paper, it is shown that the phase difference between the generated sinusoidal flux and the injected sinusoidal current is related to the stator resistance mismatch. Using this phase difference, the stator resistance is estimated. To validate the proposed model-free estimator, simulations were performed with Matlab Simulink and the results were compared with the extended Kalman filter observer. Finally, experimental tests, under different conditions, were performed to estimate the stator resistance of a WRSM.

This paper presents a compact and efficient integrated interface circuit for piezoelectric energy harvesting. While state-of-the-art interface circuits require either an external inductor or a significant number of additional capacitors to achieve high voltage flip and thus improve power efficiency, the proposed Full Active Rectifier on Flipping Capacitor (FAR-FC) is based on a reduced set of flipping capacitors and an active rectifier to efficiently flip the voltage across the piezoelectric transducer. In addition, this optimized SSHC circuit reaches better power efficiency when the piezoelectric transducer operates under low mechanical excitation, i.e. when the open-circuit voltage of the piezoelectric transducer is V o c = 1 V , while usually V o c ≥ 2 V in literature. Furthermore, the FAR-FC supports piezoelectric transducers with higher inherent capacitance values compared to those usually reported in literature, which makes the circuit potentially suitable for a larger variety of applications. The interface circuit was designed and fabricated in a 0.35 μm CMOS process. Measurement results show that the voltage flip efficiency goes up to 90 % . It also reveals that the proposed FAR-FC circuit achieves power performance up to 5.64 × higher than a conventional full-bridge rectifier.

In this paper, we analyze the effect of an enhanced voltage flip technique on the power performance of a piezoelectric energy harvester. The enhanced voltage flip principle is based on a synchronized-switch-based architecture, and is referred to as FAR (Full Active Rectifier). It uses a tiny amount of the stored charge to boost the voltage flip. This work aims to demonstrate that, beside the enhanced flip efficiency, the FAR also contributes to improve the power efficiency of the harvester, especially under changing load constraint. Therefore, the paper proposes a thorough comparison between the FAR and its conventional counterpart, the Switch-only technique. The FAR is easy to implement and does not require any external inductor or capacitor. It only needs a reduced set of switches, an active diode and a simple control sequence, and can thus be implemented on a fully integrated circuit. The FAR can be used as a standalone voltage flip solution or in addition to further boost the flip efficiency in a state-of-the-art architecture such as SSHC for example. Tests were performed on a 0.35-µm process CMOS prototype IC. Experimental results revealed that the FAR extracts 19.1μW from an off-the-shelf piezoelectric transducer when the output voltage is regulated at 1 V with 1 V open-circuit voltage and delivers up to 20% more power than the conventional Switch-only technique under load constraint. It also shows over 11× power efficiency improvement compared to a conventional diode-based full bridge rectifier.

In the original publication [...]

This paper proposes a new Unified Switch Fault Diagnosis (UFD) approach for two-stage non-isolated DC-DC converters used in energy harvesting applications. The proposed UFD is compared with a switch fault diagnosis consisting of two separate fault detection algorithms, working in parallel for each converter. The proposed UFD is simpler than the two parallel fault diagnosis methods in realization. Moreover, it can detect both types of switch failures, open circuit and short circuit switch faults. It can also be used for any two-stage non-isolated DC-DC converters based on two single switch converters, no matter the converter circuits in each stage. Some selected simulation and Hardware-in-the-Loop (HIL) experimentation results confirm the validity and efficiency of the proposed UFD. Also, the proposed UFD is applied successfully for fault-tolerant operation of a buck/buck–boost two-stage converter with synchronous control and a redundant switch.