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Without the Fluorinert solution and proper pad design, the high–voltage (HV) transistor used during the DC breakdown voltage (Vbk) measurement might be damaged by the partial discharge (PD) in the air if its Vbk is close to one thousand volts or more. From the waveform measurement, the PD in the air occurred at 650 V HV GaN HEMTs during the Vbk measurement, it is ignited by the unipolar arc, and it is not ignited by the avalanche breakdown. This is based on the fact that the current falls below zero ampere to become a negative current, and the voltage rises so that it is higher than the setting voltage of the DC meter at the onset of the PD, thus corresponding with the electrons, leaving the plasma to cathode, and enabling a build–in potential to exist in the plasma. Then, the PD ignites because the current starts to rise in order to allow for a positive spike current; the voltage level subsequently falls and a lower voltage reading is obtained.

A simple scheme is proposed to increase the hold voltage and not change the original trigger voltage of a silicon-controlled rectifier (SCR) to enhance its latch-up immunity without changing the device dimensions. It is found that using the lightly doped P-diffusion instead of the highly doped P+ diffusion as the P emitter of the anode can increase the hold voltage of an SCR.

The influence of the body layout on the charged device model (CDM) failure site and the robustness of the input buffer is explored. The failure analysis results confirm that the gate oxide is damaged. The failure site can be moved from the region above the channel to the overlap region between the source and the gate once the body layout is cut from a ring into a small segment, providing direct evidence demonstrating that the CDM current flows through the gate oxide via the body and the source of the transistor, since both connect to the Vss bus line. Otherwise, changing the body layout of the input buffer transistor does not vary the failure location.