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"Logic circuits."
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Design of Memristor-Based Combinational Logic Circuits
This paper proposes three modified memristor ratioed logic (MRL) gates: NOT, NOR and A AND (NOR B) (i.e., A·B¯), each of which only needs 1 memristor and 1 NMOS. Based on the modified MRL gates, we design some combinational logic circuits, including 1-bit comparator, 3-bit binary encoder, 3-bit binary decoder and 4:1 multiplexer. Furthermore, an improved multifunctional logic module is proposed, which contains one NMOS transistor and five memristors, and can implement AND, OR and XOR logic operations. Using this multifunctional logic module, a 4-bit comparator and a 1-bit full adder are designed. Finally, the proposed combinational logic circuits are verified by LTSPICE simulations. Compared with other memristor-based logic circuits and the traditional CMOS technology, the proposed logic circuits have made great progress in reducing delay, power consumption and the number of transistors.
Journal Article
A universal method for designing low-power carbon nanotube FET-based multiple-valued logic circuits
This study presents new low-power multiple-valued logic (MVL) circuits for nanoelectronics. These carbon nanotube field effect transistor (FET) (CNTFET)-based MVL circuits are designed based on the unique characteristics of the CNTFET device such as the capability of setting the desired threshold voltages by adopting correct diameters for the nanotubes as well as the same carrier mobility for the P- and N-type devices. These characteristics make CNTFETs very suitable for designing high-performance multiple-Vth circuits. The proposed MVL circuits are designed based on the conventional CMOS architecture and by utilising inherently binary gates. Moreover, each of the proposed CNTFET-based ternary circuits includes all the possible types of ternary logic, that is, negative, positive and standard, in one structure. The method proposed in this study is a universal technique for designing MVL logic circuits with any arbitrary number of logic levels, without static power dissipation. The results of the simulations, conducted using Synopsys HSPICE with 32 nm-CNTFET technology, demonstrate improvements in terms of power consumption, energy efficiency, robustness and specifically static power dissipation with respect to the other state-of-the-art ternary and quaternary circuits.
Journal Article
Memristive self-learning logic circuit with application to encoder and decoder
Different logic circuits based on memristors have been extensively investigated. However, most of these circuits require accurate initialization. A self-learning logic circuit based on mermristors that can achieve various logic gates without initialization is proposed in this paper. Three functional blocks, including a sum block, a learning block, and a compare block, are elaborately designed in the proposed logic circuit. Programmable switches in the sum and compare blocks enable the circuit to perform various logic gates, such as Boolean, IMPLY, and random logical combinations. In these various logical operations, the learning block can automatically obtain different memristance states. The aforementioned logic operations can easily be extended to multi-fan-in logic and logical cascade operations. Circuit designs of an encoder and decoder are considered as application examples. Finally, PSpice simulation results of the logic circuits and extended applications are provided. Simulation results indicate that the proposed circuit can effectively perform different logic operations and exhibits excellent robustness to circuit device variations.
Journal Article
Ternary Logic Design Based on Novel Tunneling-Drift-Diffusion Field-Effect Transistors
In this paper, a novel Tunneling-Drift-Diffusion Field-Effect Transistor (TDDFET) based on the combination of the quantum tunneling and conventional drift-diffusion mechanisms is proposed for the design of ternary logic circuits. The working principle of the TDDFET is analyzed in detail. Then, the device is packaged as a “black box” based on the table lookup method and further embedded into the HSPICE platform using the Verilog-A language. The basic unit circuits, such as the Standard Ternary Inverter (STI), Negative Ternary Inverter (NTI), Positive Ternary Inverter (PTI), Ternary NAND gate (T-NAND), and Ternary NOR gate (T-NOR), are designed. In addition, based on the designed unit circuits, the combinational logic circuits, such as the Ternary Encoder (T-Encoder), Ternary Decoder (T-Decoder), and Ternary Half Adder (T-HA), and the sequential logic circuits, such as the Ternary D-Latch and edge-triggered Ternary D Flip-Flop (T-DFF), are built, which has important significance for the subsequent investigation of ternary logic circuits.
Journal Article
Recent progresses of NMOS and CMOS logic functions based on two-dimensional semiconductors
Metal-oxide-semiconductor field effect transistors (MOSFET) based on two-dimensional (2D) semiconductors have attracted extensive attention owing to their excellent transport properties, atomically thin geometry, and tunable bandgaps. Besides improving the transistor performance of individual device, lots of efforts have been devoted to achieving 2D logic functions or integrated circuit towards practical application. In this review, we discussed the recent progresses of 2D-based logic circuit. We will first start with the different methods for realization of n-type metal-oxide-semiconductor (NMOS)-only (or p-type metal-oxide-semiconductor (PMOS)-only) logic circuit. Next, various device polarity control and complementary-metal-oxide-semiconductor (CMOS) approaches are summarized, including utilizing different 2D semiconductors with intrinsic complementary doping, charge transfer doping, contact engineering, and electrostatics doping. We will discuss the merits and drawbacks of each approach, and lastly conclude with a short perspective on the challenges and future developments of 2D logic circuit.
Journal Article