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For the first time, the effect of the gate structure on the kink phenomenon in S22 of the AlGaN/GaN HEMT is investigated in this study. To provide critical understanding into the S22 kink effect, the kink effect in S22 of the AlGaN/GaN HEMTs is investigated with transistors that have various gate lengths (Lg) and gate connected field plate lengths (LgH). The HEMTs are fabricated and characterised at the same conditions, and the equivalent circuit models are used to get consistent results. The experimental results show that the gate structure can play an important role on kink effect in S22. The results present valuable information on the development of the AlGaN/GaN HEMT technology and the MMIC design regarding kink effect.

This paper reports design and development of high–low type Si/SiC‐based Impact Ionisation Avalanche Transit Time device and its on‐chip characterisation. The design has been performed with indigenously developed strain engineered non‐linear self‐consistent large‐signal simulator. On‐chip hetero‐structure SiC Impact Ionisation Avalanche Transit Time at 94 GHz has been successfully fabricated and on‐chip DC testing (forward and reverse) results are reported for the first time. The device breaks down at 185 V (simulated result: 188 V) and breakdown current is ∼12.5 mA. If the diode chip is mounted properly with W‐band waveguide, it is expected to generate ∼2 W of Radio Frequency (RF) power at W‐band window frequency (∼94 GHz). The experimental verification of newly developed in‐house strain‐corrected mixed quantum tunnelling drift diffusion simulator is done successfully.

Here, a gated‐anode diode (GAD) is proposed where an anode electrode is formed by connecting a gate electrode and an ohmic electrode of a normally‐off GaN HEMT for a 5.8 GHz rectenna. A wide recessed gate GaN GADs were prepared and the recess length dependence of their electrical characteristics was investigated. Typical DC characteristics of the HEMTs are a threshold voltage (Vth) of +0.3 V and a maximum drain current (Imax) of 300 mA/mm. The GADs showed the characteristics of maximum forward current (If) of 350 mA/mm, reverse breakdown voltage (BVr) of 40 V, and off‐state capacitance (Coff) of 0.28 pF/mm by using optimized recess length. We constructed SPICE model of the GADs. The SPICE simulation predicted a rectifier efficiency of 81% and a DC output power of 10 W for bridge type 5.8 GHz rectifier using four GADs with each gate width of 0.8 mm.

Gallium nitride based high‐power electronic devices are now in full swing. However, the phenomenon that the gallium nitride Schottky diodes break down prematurely without reaching the gallium nitride material limit is unsolved. This paper proposes a novel hybrid termination structure for vertical gallium nitride Schottky diodes to improve breakdown voltage. This work is carried out to simulate the breakdown voltage and reverse characteristics of the vertical gallium nitride Schottky diode by using technology computer aided design (TCAD) simulation. Under the same testing conditions, we demonstrate that compared with the control vertical Schottky diode, the breakdown voltage of the proposed Schottky diode can be significantly advanced, which has increased by 350 V and reached 850 V.

With the growing penetration of renewable generation, more IGBT modules are applied in photovoltaic (PV) systems. The aging failure of IGBT modules exists in its entire life cycle, and it is with no doubt the key factor that influence the reliability of the whole converter system. The bond wire fatigue is the main reason leads to the increase of loss power and heat generation of the module, which will further shorten the remaining useful lifetime of the converter and sabotage the system reliability. The equivalent circuit is used to analyse the IGBT conduction characteristics, which reveals the influence brought by the breaking and shedding of bond wires on the IGBT on-state saturation voltage drop. However, bond wire fatigue is not the only reason that affects the chip on-state saturation voltage drop. Therefore, a forward characteristic modeling of IGBT based on instantaneous on-state resistance is proposed, in order to provide a complete understanding of the on-state saturation voltage drop considering the effects from both the collector current and junction temperature. The model can be used to judge whether the on-saturation voltage drop deviates from its theoretical value under corresponding working conditions, which can tell if the bond wire fatigue occurs or not.

This paper is based on the extensive study of a Junctionless transistor. Since the entire conventional transistor have junction, which limits it's scaling as it requires very abrupt junction, high concentration gradient and become challenging with every technology node. The problems comes when there is a junction in such a device like MOSFETs which has source junction and drain junction formed with oppositely doped substrate. A junctionless transistor is a uniformly doped nanowire without junction and no doping concentration gradient exist. It shows better short channel effect and less degradation in mobility with temperature, small DIBL, subthreshold swing and higher voltage gain which shows good scalability below 10nm and reduces the fabrication complexity. Junctionless transistor is a very promising candidate for future nano scale MOSFET device.

In this paper, the influence of cassette design upon the breakdown performance of a 4.5kV press-pack IGBT module is investigated. Detailed numerical simulations show the influence of air gap and die position upon the breakdown performance of the assembly. Results show that gas rupture voltage is dependent upon the potential distribution within the PEEK cassette and silicon power device. Furthermore, forming a field-plate on the internal PEEK surface shows a significant reduction in electric field within the air gap.

In this paper, 2D Dual Material Cylindrical Surrounding Gate MOSFET (DMCSG-MOSFET) has been modelled using SENTAURUS TCAD device simulator. The effect of gate misalignment at the source and drain end of DMCSG-MOSFET has been investigated. The variation of electrical parameters such as drain current, leakage current, threshold voltage and sub-threshold slope due to the increase in misalignment length at both ends has been studied. However the above results are compared to the conventional cylindrical MOSFET.

Advancement of semiconductor device in sub 45 nm range has led to lots of development in device area, but it also raises some critical issues. One of such an issues is related to silicon dioxide layer which starts breakdown once its thickness is around 2nm range due to gate leakage current. In this paper, we try to overcome this problem by replacing the front gate silicon dioxide dielectric layer of dual material double gate silicon on nothing MOSFET by high k dielectric material layer, hafnium dioxide. This paper gives an analysis of the important parameter of semiconductor device such as threshold voltage and surface potential changes with change of dielectric layer to Hafnium dioxide from conventional silicon dioxide. The results are validated in ATLAS 2D simulation tools.

A semi-classical model describing electron and hole trap-assisted tunneling (TAT), which accounts for multiphonon and elastic transitions, is presented and tested on different single-quantum-well light-emitting diode (LED) structures. Our numerical and experimental study confirms that TAT constitutes one of the main contributions to the forward current below the LED optical turn-on.