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result(s) for
"integral nonlinearity correction"
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Fixed Pattern Noise Reduction and Linearity Improvement in Time-Mode CMOS Image Sensors
2020
In the paper, a digital clock stopping technique for gain and offset correction in time-mode analog-to-digital converters (ADCs) has been proposed. The technique is dedicated to imagers with massively parallel image acquisition working in the time mode where compensation of dark signal non-uniformity (DSNU) as well as photo-response non-uniformity (PRNU) is critical. Fixed pattern noise (FPN) reduction has been experimentally validated using 128-pixel CMOS imager. The reduction of the PRNU to about 0.5 LSB has been achieved. Linearity improvement technique has also been proposed, which allows for integral nonlinearity (INL) reduction to about 0.5 LSB. Measurements confirm the proposed approach.
Journal Article
Minimal model for tidal bore revisited
2019
This develops a recent analysis of gentle undular tidal bores (2018 New J. Phys. 20 053066) and corrects an error. The simplest linear-wave superposition, of monochromatic waves propagating according to the shallow-water dispersion relation, leads to a family of profiles satisfying natural tidal bore boundary conditions, involving initial smoothed steps with different shapes. These profiles can be uniformly approximated to high accuracy in terms of the integral of an Airy function with deformed argument. For the long times corresponding to realistic bores, the profiles condense asymptotically onto the previously obtained integral-Airy function with linear argument: as the bore propagates, it forgets the shape of the initial step. The integral-Airy profile expands slowly, as the cube root of time, rather than advancing rigidly. This 'minimal model' leads to simple formulas for the main properties of the profile: amplitude, maximum slope, 'wavelength', and steepness; and an assumption about energy loss suggests how the bore weakens as it propagates.
Journal Article
Interconnected Microgrids Load‐Frequency Control Using Stage‐by‐Stage Optimized TIDA+1 Error Signal Regulator
by
Rahnama, Alireza
,
Shayeghi, Hossein
,
Szumny, Antoni
in
Algorithms
,
Alternative energy sources
,
Control systems
2025
Load‐frequency control (LFC) is essential for maintaining system stability and ensuring high power quality in microgrids (MGs), particularly those heavily reliant on renewable energy sources (RES) and operating independently of the main grid. This paper introduces a novel control strategy aimed at improving LFC performance in interconnected MGs by correcting the error signal. The proposed controller, denoted as TIDA+1, combines tilt, integrator, derivative, and acceleration operators in a parallel configuration to refine the incoming error signal. The controller parameters are optimized using a modified particle swarm optimization (PSO) algorithm with nonlinear time‐varying acceleration coefficients (NTVAC). The controller's effectiveness is validated through four distinct scenarios, including sudden load variations, system modeling uncertainties, fluctuations in RES outputs, and the impact of nonlinearities. Additionally, a lab‐scale evaluation of the controller has been conducted to further assess its practical applicability. Comparative results demonstrate that the TIDA+1 controller outperforms traditional controllers such as PID and FOPID, especially under complex operational conditions. The study highlights the TIDA+1 controller as a robust and viable solution for LFC in MGs, with potential for future scalability and application in larger systems. Numerical assessments and comparisons demonstrate that the stage‐by‐stage optimized TIDA+1 controller, despite its simple design, exhibits markedly superior performance under intricate working situations compared with traditional controllers of the same category, such as PID and FOPID. Consequently, it represents a viable choice for executing the LFC tasks in the MGs.
Journal Article
Digital DAC calibration technique for Delta capital sigma and incremental modulators
2012
A new digital nonlinearity calibration and correction technique is proposed for multi-bit DACs in Delta zeta and incremental modulators. By finding the differences between capacitance errors using the Delta zeta modulator, the integral nonlinearity of the DAC can be found, and corrected digitally.
Journal Article