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FPGA Implementation of Complex-Valued Neural Network for Polar-Represented Image Classification
FPGA Implementation of Complex-Valued Neural Network for Polar-Represented Image Classification
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FPGA Implementation of Complex-Valued Neural Network for Polar-Represented Image Classification
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FPGA Implementation of Complex-Valued Neural Network for Polar-Represented Image Classification
FPGA Implementation of Complex-Valued Neural Network for Polar-Represented Image Classification

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FPGA Implementation of Complex-Valued Neural Network for Polar-Represented Image Classification
FPGA Implementation of Complex-Valued Neural Network for Polar-Represented Image Classification
Journal Article

FPGA Implementation of Complex-Valued Neural Network for Polar-Represented Image Classification

2024
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Overview
This proposed research explores a novel approach to image classification by deploying a complex-valued neural network (CVNN) on a Field-Programmable Gate Array (FPGA), specifically for classifying 2D images transformed into polar form. The aim of this research is to address the limitations of existing neural network models in terms of energy and resource efficiency, by exploring the potential of FPGA-based hardware acceleration in conjunction with advanced neural network architectures like CVNNs. The methodological innovation of this research lies in the Cartesian to polar transformation of 2D images, effectively reducing the input data volume required for neural network processing. Subsequent efforts focused on constructing a CVNN model optimized for FPGA implementation, emphasizing the enhancement of computational efficiency and overall performance. The experimental findings provide empirical evidence supporting the efficacy of the image classification system developed in this study. One of the developed models, CVNN_128, achieves an accuracy of 88.3% with an inference time of just 1.6 ms and a power consumption of 4.66 mW for the classification of the MNIST test dataset, which consists of 10,000 frames. While there is a slight concession in accuracy compared to recent FPGA implementations that achieve 94.43%, our model significantly excels in classification speed and power efficiency—surpassing existing models by more than a factor of 100. In conclusion, this paper demonstrates the substantial advantages of the FPGA implementation of CVNNs for image classification tasks, particularly in scenarios where speed, resource, and power consumption are critical.