Asset Details
MbrlCatalogueTitleDetail
Do you wish to reserve the book?
Exploiting On-Chip Voltage Regulators for Leakage Reduction in Hardware Masking
by
Seçkiner, Soner
, Köse, Selçuk
in
Analysis
/ Boolean
/ Design
/ Digital integrated circuits
/ Discovery and exploration
/ Electric current regulators
/ Electric power
/ Electricity generation
/ hardware masking
/ Investment analysis
/ lightweight countermeasure
/ Noise control
/ Outer space
/ power delivery network
/ Privacy
/ Semiconductors
/ side-channel attack
/ Software
/ Space exploration
/ Very-large-scale integration
/ voltage regulator
/ Voltage regulators
2022
Hey, we have placed the reservation for you!
By the way, why not check out events that you can attend while you pick your title.
You are currently in the queue to collect this book. You will be notified once it is your turn to collect the book.
Oops! Something went wrong.
Looks like we were not able to place the reservation. Kindly try again later.
Are you sure you want to remove the book from the shelf?
Exploiting On-Chip Voltage Regulators for Leakage Reduction in Hardware Masking
by
Seçkiner, Soner
, Köse, Selçuk
in
Analysis
/ Boolean
/ Design
/ Digital integrated circuits
/ Discovery and exploration
/ Electric current regulators
/ Electric power
/ Electricity generation
/ hardware masking
/ Investment analysis
/ lightweight countermeasure
/ Noise control
/ Outer space
/ power delivery network
/ Privacy
/ Semiconductors
/ side-channel attack
/ Software
/ Space exploration
/ Very-large-scale integration
/ voltage regulator
/ Voltage regulators
2022
Oops! Something went wrong.
While trying to remove the title from your shelf something went wrong :( Kindly try again later!
Do you wish to request the book?
Exploiting On-Chip Voltage Regulators for Leakage Reduction in Hardware Masking
by
Seçkiner, Soner
, Köse, Selçuk
in
Analysis
/ Boolean
/ Design
/ Digital integrated circuits
/ Discovery and exploration
/ Electric current regulators
/ Electric power
/ Electricity generation
/ hardware masking
/ Investment analysis
/ lightweight countermeasure
/ Noise control
/ Outer space
/ power delivery network
/ Privacy
/ Semiconductors
/ side-channel attack
/ Software
/ Space exploration
/ Very-large-scale integration
/ voltage regulator
/ Voltage regulators
2022
Please be aware that the book you have requested cannot be checked out. If you would like to checkout this book, you can reserve another copy
We have requested the book for you!
Your request is successful and it will be processed during the Library working hours. Please check the status of your request in My Requests.
Oops! Something went wrong.
Looks like we were not able to place your request. Kindly try again later.
Exploiting On-Chip Voltage Regulators for Leakage Reduction in Hardware Masking
Journal Article
Exploiting On-Chip Voltage Regulators for Leakage Reduction in Hardware Masking
2022
Request Book From Autostore
and Choose the Collection Method
Overview
A design space exploration of the countermeasures for hardware masking is proposed in this paper. The assumption of independence among shares used in hardware masking can be violated in practical designs. Recently, the security impact of noise coupling among multiple masking shares has been demonstrated both in practical FPGA implementations and with extensive transistor level simulations. Due to the highly sophisticated interactions in modern VLSI circuits, the interactions among multiple masking shares are quite challenging to model and thus information leakage from one share to another through noise coupling is difficult to mitigate. In this paper, the implications of utilizing on-chip voltage regulators to minimize the coupling among multiple masking shares through a shared power delivery network (PDN) are investigated. Specifically, different voltage regulator configurations where the power is delivered to different shares through various configurations are investigated. The placement of a voltage regulator relative to the masking shares is demonstrated to a have a significant impact on the coupling between masking shares. A PDN consisting of two shares is simulated with an ideal voltage regulator, strong DLDO, normal DLDO, weak DLDO, two DLDOs, and two DLDOs with 180∘ phase shift. An 18 × 18 grid PDN with a normal DLDO is simulated to demonstrate the effect of PDN impedance on security. The security analysis is performed using correlation and t-test analyses where a low correlation between shares can be inferred as security improvement and a t-test value below 4.5 means that the shares have negligible coupling, and thus the proposed method is secure. In certain cases, the proposed techniques achieve up to an 80% reduction in the correlation between masking shares. The PDN with two DLDOs and two-phase DLDO with 180∘ phase shift achieve satisfactory security levels since t-test values remain under 4.5 with 100,000 traces of simulations. The security of the PDN improves if DLDO is placed closer to any one of the masking shares.
Publisher
MDPI AG,MDPI
Subject
This website uses cookies to ensure you get the best experience on our website.