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Ni/ n -GaP/Al Schottky diodes have been fabricated and thermally annealed at 400°C to obtain Schottky rectifying contacts with optimum performance and improve understanding of the effect of thermal annealing and the measurement temperature (MT) on their electrical characteristics. The measurement temperature was varied from 100 K to 400 K in steps of 20 K to determine the current–voltage ( I – V ) characteristics of the unannealed (as-deposited) and annealed diodes. The values of the barrier height (BH), ideality factor n , and Richardson constant of both diodes were determined by using the thermionic emission (TE) current equations. The results revealed that the BH of the annealed diode was higher than that of the as-deposited diode in the measurement temperature range of 260 K to 400 K; that is, a barrier modification by approximately 0.14 eV was observed. A greater series resistance R s was obtained for the as-deposited than annealed diode at each temperature, except 140 K. This increase of R s can be attributed to diffusion of Ni atoms into the GaP substrate due to the annealing at 400°C. The abnormalities in the diode parameters were successfully explained by TE current equations modified according to a Gaussian distribution of the temperature-dependent barrier heights.

SiC Junction Barrier Schottky (JBS) Rectifier is a kind of unipolar power diode with low threshold voltage and high reverse blocking voltage. And the Schottky barrier Φ BN is a main technology parameter, which could greatly affect the forward conduction power and reverse leakage current in the JBS rectifiers. Therefore, it is necessary to balance the influence of Φ BN on the electrical characteristics of JBS rectifiers. In this paper, physical properties at the metal-semiconductor at the Schottky-contact could be optimized by the improvement of Schottky-contact process. And this optimization could significantly decrease Φ BN to reduce the on-state voltage drop V F and minimize negative impact on its reverse characteristics. After the completion of Silicon carbide JBS diodes, the static parameter electrical test was carried out on the wafer by using Keysight B1505A Power Device Analyzer/Curve Tracer. The test results show that the Schottky barrier height Φ BN of JBS Schottky rectifier manufactured by the modified Schottky foundation technology decreased from 1.19eV to 0.99eV and I R increased from 1.08μA to 3.73μA (reverse blocking voltage V R =1200V). It indicated that the power consumption of Schottky barrier junction in JBS rectifiers could be significantly reduced by about 25%, and I R could effectively be limited to less than 10μA.

Tin selenide (SnSe), a member of the IV-VI group, belongs to the layered transition metal chalcogenide (TMC) family. As TMCs are chemically inert, and have a binary layered structure of Sn-X (X = S, Se, Te) type, they are used widely in the areas of photovoltaic, electronic, and optoelectronic devices. In the present study, a direct vapor transport technique was used to grow single crystals. The synthesized crystals were examined with energy-dispersive analysis of x-rays, optical microscopy-scanning electron microscopy, and x-ray diffraction techniques to investigate the purity, surface morphology, and phase, respectively. The present work reports the use of a layered monochalcogenide single-crystal substrate for preparation of metal-semiconductor or Schottky junction devices. The In/p-SnSe Schottky diode was prepared by a thermal evaporation method. Analysis for the In/p-SnSe Schottky contact is based on the measurement of the current–voltage characteristics of the Schottky diode within the temperature range (313 K < T < 413 K). Characteristics were analyzed using thermionic emission theory and Schottky barrier diode parameters including barrier height, ideality factor, and series resistance, which were obtained and analyzed using a Ln (I)-V method and Cheung’s method. This work also reports the anisotropic current–voltage characteristics as well as the alteration in the Schottky barrier diode parameters at high temperature.

Schottky diode-based temperature sensors are the most common commercially available temperature sensors, and they are attracting increasing interest owing to their higher Schottky barrier height compared to their silicon counterparts. Therefore, this paper presents a comparison of the thermal sensitivity variation trend in temperature sensors, based on dual 4H-SiC junction barrier Schottky (JBS) diodes and Schottky barrier diodes (SBDs). The forward bias current–voltage characteristics were acquired by sweeping the DC bias voltage from 0 to 3 V. The dual JBS sensor exhibited a higher peak sensitivity (4.32 mV/K) than the sensitivity exhibited by the SBD sensor (2.85 mV/K), at temperatures ranging from 298 to 573 K. The JBS sensor exhibited a higher ideality factor and barrier height owing to the p–n junction in JBS devices. The developed sensor showed good repeatability, maintaining a stable output over several cycles of measurements on different days. It is worth noting that the ideality factor and barrier height influenced the forward biased voltage, leading to a higher sensitivity for the JBS device compared to the SBD device. This allows the JBS device to be suitably integrated with SiC power management and control circuitry to create a sensing module capable of working at high temperatures.

Lateral Schottky barrier diodes (SBD) were fabricated on a molecular beam epitaxy (MBE) grown, Si-doped β -Ga 2 O 3 wafer measuring 1 cm by 1.5 cm. These devices featured varying anode to cathode distances and included anode connected field plate structures. A device with a 25 μm anode to cathode spacing exhibited a high breakdown voltage exceeding 3.6 kV. A smaller device with a 10 μm anode to cathode spacing demonstrated a R on,sp (specific on resistance) of 0.1508 Ω·cm 2 and a power figure of merit of 18.87 MW/cm 2 . The incorporation of titanium, characterized by a relatively low work function, as the Schottky contact enabled the achievement of a very low turn-on voltage and a sub-60 mV/dec subthreshold swing.

Gallium oxide (β‐Ga2O3) is a promising ultrawide‐bandgap semiconductor for next‐generation power electronics, but its performance is strongly limited by trap states that capture carriers. In this study, a single‐pulse characterization method is presented to directly probe trap dynamics in β‐Ga2O3 Schottky barrier diodes (SBDs). Transient current responses are systematically investigated under varying pulse widths, rise and fall times, amplitudes, and temperatures. The results reveal that traps in the neutral region progressively participate in electron capture, resulting in current decay during the constant‐voltage phase. Additionally, a delayed trap response produces asymmetry between the ramp‐up and ramp‐down transients. Analysis of the current decay yielded a trap density of ≈5×1014 cm−2, representing the total trap density near the Schottky junction. Exponential fitting provides a carrier capture time constant of ≈ 30 µs at a forward bias of 2 V, consistent with the onset of trap‐induced current degradation. Temperature‐dependent measurements indicate that carrier capture is suppressed at elevated temperatures, resulting in a trap activation energy of ≈0.16 eV. These findings demonstrate that the single‐pulse method offers a straightforward and effective approach for evaluating trap states under practical operating conditions in β‐Ga2O3 devices. A single‐pulse approach uncovers trap dynamics in β‐Ga2O3 Schottky barrier diodes. Transient current profiling reveals rapid electron capture, delayed trap filling, and clear thermal effects. Extracted trap densities, capture time constants, and activation energies indicate that this simple pulse technique enables effective evaluation of trap states under realistic device operation conditions.

Traditional GaAs-based frequency multipliers still exhibit great challenges to meet the demand for solid-state high-power THz sources due to low breakdown voltage and heat dissipation of the Schottky barrier diode (SBD). In this study, a GaN SBD chain was fabricated with n−/n+-GaN structure. As a consequence, the breakdown voltage of 54.9 V at 1 μA and cut-off frequency of 587.5 GHz at zero bias were obtained. A 120 GHz frequency-doubler module based on the GaN SBD chain was designed and fabricated. When driven with 500 mW input power in a continuous wave, the output power of the frequency-doubler module was 15.1 mW at 120 GHz. Moreover, the experiments show that the frequency-doubler module can endure an input power of 2 W. In addition, it is worth noting that the SBD chain works well at an anode temperature of 337.2 °C.

1.2 kV SiC buried grid junction barrier Schottky (BG-JBS) diodes are demonstrated. The design considerations for high temperature applications are investigated. The design is optimized in terms of doping concentration and thickness of the epilayers, as well as grid size and spacing dimensions, in order to obtain low on-resistance and reasonable leakage current even at high o temperatures. The device behavior at temperatures ranging from 25 to 250 C is analyzed and measured on wafer level. The forward voltage drop of 1.1 V at 100 A/cm 2 and 3.8 V at 1000 A/cm 2 is measured, respectively. At reverse voltage of 1 kV, a leakage current density below 0.1 μA/cm 2 and below 0.1 mA/cm 2 is measured at 25 and 250°C, respectively. This proves the effective shielding effect of the BG-JBS design and provides benefits in high voltage applications, particularly for high temperature operation.

This work presents a design study of customized p+ arrays having influence on the electrical properties of manufactured 4H-SiC Junction Barrier Schottky (JBS) diodes with designated electrical characteristics of 5 A forward and 650 V blocking capabilities. The effect of the Schottky area consuming p+ grid on the forward voltage drop, the leakage current and therefore the breakdown voltage was investigated. A recessed p+ implantation, realized through trench etching before implanting the bottom of the trenches, results in a more effective shielding of the electrical field at the Schottky interface and therefore reduces the leakage current. Customizing the p+ grid array in combination with the trench structure, various JBS diode variants with active areas of 1.69 mm2 were fabricated whereas forward voltage drops of 1.58 V @ 5 A with blocking capabilities up to 1 kV were achieved.

A thorough investigation of Gallium Nitride and Aluminum Nitride-on-Gallium Nitride Junction Barrier Schottky diodes, focusing on inter-p+ spacings of 0.5 to 2.5 μm, was conducted to optimize the performance for high-power, high-frequency, and high-temperature applications. This study addresses a gap in the existing research by systematically examining the impact of inter-p+ spacing over a wide range, providing critical insights for practical designs and applications. The optimal Junction Barrier Schottky spacing was identified as 1–1.3 μm for fully Gallium Nitride-based diodes and 1.1–1.4 μm for Aluminum Nitride/Gallium Nitride diodes, revealing significant improvements over standard designs. For an intrinsic layer thickness of 0.5 µm, the best trade-off between specific on-resistance and breakdown voltage is achieved at 1.2 μm spacing for Gallium Nitride-based diodes, yielding a specific on-resistance of 9.93 × 10−3 mΩ cm2, a breakdown voltage of 185.72 V, a critical electric field of 3.75 MV/cm, and a Baliga’s Figure of Merit of 3.47 GW/cm2. While Aluminum Nitride/Gallium Nitride diodes at 1.4 μm spacing achieve optimal performance with a specific on-resistance of 3.63 × 10−3 mΩ cm2, a breakdown voltage of 156.98 V, a critical electric field of 4.32 MV/cm, and a Baliga’s Figure of Merit of 6.78 GW/cm2. This research demonstrates the superior performance of Junction Barrier Schottky diodes compared to PiN diodes under forward bias and Schottky diodes under reverse bias conditions. Notably, the Aluminum Nitride/Gallium Nitride diodes exhibit an unprecedented Baliga’s Figure of Merit, setting a new benchmark in the field. These findings pave the way for the next generation of high-efficiency, high-reliability power devices by demonstrating the transformative potential of optimized inter-p+ spacings in Junction Barrier Schottky diode design.