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Investigation of dual intrinsic a-Si:H films for crystalline silicon surface passivation by spectroscopic ellipsometry: application in silicon heterojunction solar cells
Investigation of dual intrinsic a-Si:H films for crystalline silicon surface passivation by spectroscopic ellipsometry: application in silicon heterojunction solar cells
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Investigation of dual intrinsic a-Si:H films for crystalline silicon surface passivation by spectroscopic ellipsometry: application in silicon heterojunction solar cells
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Investigation of dual intrinsic a-Si:H films for crystalline silicon surface passivation by spectroscopic ellipsometry: application in silicon heterojunction solar cells
Investigation of dual intrinsic a-Si:H films for crystalline silicon surface passivation by spectroscopic ellipsometry: application in silicon heterojunction solar cells

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Investigation of dual intrinsic a-Si:H films for crystalline silicon surface passivation by spectroscopic ellipsometry: application in silicon heterojunction solar cells
Investigation of dual intrinsic a-Si:H films for crystalline silicon surface passivation by spectroscopic ellipsometry: application in silicon heterojunction solar cells
Journal Article

Investigation of dual intrinsic a-Si:H films for crystalline silicon surface passivation by spectroscopic ellipsometry: application in silicon heterojunction solar cells

2023
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Overview
The microstructure factor ( R* ) of the PECVD-grown intrinsic amorphous silicon (i-a-Si:H) layer plays a crucial role in crystalline silicon (c-Si) surface passivation and charge carrier transport in silicon heterojunction (SHJ) solar cells. In this work, we have used stack of i-a-Si:H passivation layers deposited at two different temperatures to improve the c-Si surface passivation by minimizing the interface defect density at the a-Si/c-Si interface. The initial i 1 -a-Si:H layer is deposited on the c-Si at ~ 150 °C with a high R* , and the second i 2 -a-Si:H layer is deposited at 230 °C with a low R* . Ex-situ ellipsometry analysis of i-a-Si:H layers provided information related to the void fraction of the thin films due to modification in the Si–H ≥2 and Si–H bonding environment, which plays a vital role in atomic H migration towards i-a-Si:H/c-Si interface. Combining the low- and high-temperature i-a-Si:H layer stack enhanced the cell precursor passivation to ~ 2.1 ms with an implied V oc of ~ 714 mV. Furthermore, implementing the optimized thickness (2 nm + 8 nm) of the i-a-Si:H stack (with 40% void fraction in i 1 -a-Si:H layer) in the device has led to the power conversion efficiency of ~ 19.06%.