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Implementation of a High-Sensitivity Global Navigation Satellite System Receiver on a System-on-Chip Field-Programmable Gate Array Platform
by
Majoral, Marc
, Fernández-Prades, Carles
, Arribas, Javier
in
Accuracy
/ Algorithms
/ Clocks & watches
/ Communications equipment
/ Crystal oscillators
/ Digital integrated circuits
/ Electronics in navigation
/ Embedded systems
/ Energy consumption
/ Fourier transforms
/ FPGA
/ Global positioning systems
/ GNSS
/ GPS
/ high-sensitivity GNSS receiver
/ Satellites
/ Semiconductor industry
/ Signal processing
/ SoC-FPGA
/ software-defined radio
/ system on chip
2024
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Implementation of a High-Sensitivity Global Navigation Satellite System Receiver on a System-on-Chip Field-Programmable Gate Array Platform
by
Majoral, Marc
, Fernández-Prades, Carles
, Arribas, Javier
in
Accuracy
/ Algorithms
/ Clocks & watches
/ Communications equipment
/ Crystal oscillators
/ Digital integrated circuits
/ Electronics in navigation
/ Embedded systems
/ Energy consumption
/ Fourier transforms
/ FPGA
/ Global positioning systems
/ GNSS
/ GPS
/ high-sensitivity GNSS receiver
/ Satellites
/ Semiconductor industry
/ Signal processing
/ SoC-FPGA
/ software-defined radio
/ system on chip
2024
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Implementation of a High-Sensitivity Global Navigation Satellite System Receiver on a System-on-Chip Field-Programmable Gate Array Platform
by
Majoral, Marc
, Fernández-Prades, Carles
, Arribas, Javier
in
Accuracy
/ Algorithms
/ Clocks & watches
/ Communications equipment
/ Crystal oscillators
/ Digital integrated circuits
/ Electronics in navigation
/ Embedded systems
/ Energy consumption
/ Fourier transforms
/ FPGA
/ Global positioning systems
/ GNSS
/ GPS
/ high-sensitivity GNSS receiver
/ Satellites
/ Semiconductor industry
/ Signal processing
/ SoC-FPGA
/ software-defined radio
/ system on chip
2024
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Implementation of a High-Sensitivity Global Navigation Satellite System Receiver on a System-on-Chip Field-Programmable Gate Array Platform
Journal Article
Implementation of a High-Sensitivity Global Navigation Satellite System Receiver on a System-on-Chip Field-Programmable Gate Array Platform
2024
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Overview
This paper presents the design, proof-of-concept implementation, and preliminary performance assessment of an affordable real-time High-Sensitivity (HS) Global Navigation Satellite System (GNSS) receiver. Specifically tailored to capture and track weak Galileo E1b/c signals, this receiver aims to support research endeavors focused on advancing GNSS signal processing algorithms, particularly in scenarios characterized by pronounced signal attenuation. Leveraging System-on-Chip Field-Programmable Gate Array (SoC-FPGA) technology, this design merges the adaptability of Software Defined Radio (SDR) concepts with the the robust hardware processing capabilities of FPGAs. This innovative approach enhances power efficiency compared to conventional designs relying on general-purpose processors, thereby facilitating the development of embedded software-defined receivers. Within this architecture, we implemented a modular GNSS baseband processing engine, offering a versatile platform for the integration of novel algorithms. The proposed receiver undergoes testing with live signals, showcasing its capability to process GNSS signals even in challenging scenarios with a carrier-to-noise density ratio (C/N0) as low as 20 dB-Hz, while delivering navigation solutions. This work contributes to the advancement of low-cost, high-sensitivity GNSS receivers, providing a valuable tool for researchers engaged in the development, testing, and validation of experimental GNSS signal processing techniques.
Publisher
MDPI AG,MDPI
Subject
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