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Reducing charge noise in quantum dots by using thin silicon quantum wells
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Journal Article
Reducing charge noise in quantum dots by using thin silicon quantum wells
2023
Overview
Charge noise in the host semiconductor degrades the performance of spin-qubits and poses an obstacle to control large quantum processors. However, it is challenging to engineer the heterogeneous material stack of gate-defined quantum dots to improve charge noise systematically. Here, we address the semiconductor-dielectric interface and the buried quantum well of a
28
Si/SiGe heterostructure and show the connection between charge noise, measured locally in quantum dots, and global disorder in the host semiconductor, measured with macroscopic Hall bars. In 5 nm thick
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Si quantum wells, we find that improvements in the scattering properties and uniformity of the two-dimensional electron gas over a 100 mm wafer correspond to a significant reduction in charge noise, with a minimum value of 0.29 ± 0.02 μeV/Hz
½
at 1 Hz averaged over several quantum dots. We extrapolate the measured charge noise to simulated dephasing times to
CZ
-gate fidelities that improve nearly one order of magnitude. These results point to a clean and quiet crystalline environment for integrating long-lived and high-fidelity spin qubits into a larger system.
Charge noise degrades the performance of spin qubits hindering scalability. Here the authors engineer the heterogeneous material stack in
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Si/SiGe gate-defined quantum dots, to improve the scattering properties and to reduce charge noise.
Publisher
Nature Publishing Group UK,Nature Publishing Group,Nature Portfolio
Subject
