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Realization of flexible in-memory computing in a van der Waals ferroelectric heterostructure tri-gate transistor
Realization of flexible in-memory computing in a van der Waals ferroelectric heterostructure tri-gate transistor
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Realization of flexible in-memory computing in a van der Waals ferroelectric heterostructure tri-gate transistor
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Realization of flexible in-memory computing in a van der Waals ferroelectric heterostructure tri-gate transistor
Realization of flexible in-memory computing in a van der Waals ferroelectric heterostructure tri-gate transistor
Journal Article

Realization of flexible in-memory computing in a van der Waals ferroelectric heterostructure tri-gate transistor

2024
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Overview
Combining logical function and memory characteristics of transistors is an ideal strategy for enhancing computational efficiency of transistor devices. Here, we rationally design a tri-gate two-dimensional (2D) ferroelectric van der Waals heterostructures device based on copper indium thiophosphate (CuInP 2 S 6 ) and few layers tungsten disulfide (WS 2 ), and demonstrate its multi-functional applications in multi-valued state of data, non-volatile storage, and logic operation. By co-regulating the input signals across the tri-gate, we show that the device can switch functions flexibly at a low supply voltage of 6 V, giving rise to an ultra-high current switching ratio of 10 7 and a low subthreshold swing of 53.9 mV/dec. These findings offer perspectives in designing smart 2D devices with excellent functions based on ferroelectric van der Waals heterostructures.