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A Fabrication Process for Emerging Nanoelectronic Devices Based on Oxide Tunnel Junctions

by Jeannot, Simon , Monfray, Stephane , Harvey-Collard, Patrick , Drouin, Dominique , Pioro-Ladriere, Michel , Labalette, Marina , Ecoffey, Serge , Lee Sang, Bruno , Droulers, Gabriel , Souifi, Abdelkader

in 3-D technology / CMOS / Engineering Sciences / Hafnium oxide / Nanoelectronics / Nanomaterials / Nanostructure / Nanotechnology devices / Oxidation / Oxides / Plasma etching / Semiconductors / Single-electron transistors / Titanium dioxide / Transistors / Tunnels (transportation)

2017

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A Fabrication Process for Emerging Nanoelectronic Devices Based on Oxide Tunnel Junctions

2017

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A Fabrication Process for Emerging Nanoelectronic Devices Based on Oxide Tunnel Junctions

2017

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Journal Article

A Fabrication Process for Emerging Nanoelectronic Devices Based on Oxide Tunnel Junctions

Jeannot, Simon,

Monfray, Stephane,

Harvey-Collard, Patrick,

Drouin, Dominique,

Pioro-Ladriere, Michel,

Labalette, Marina,

Ecoffey, Serge,

Lee Sang, Bruno,

Droulers, Gabriel,

Souifi, Abdelkader

2017

Overview

We present a versatile nanodamascene process for the realization of low-power nanoelectronic devices with different oxide junctions. With this process we have fabricated metal/insulator/metal junctions, metallic single electron transistors, silicon tunnel field effect transistors, and planar resistive memories. These devices do exploit one or two nanometric-scale tunnel oxide junctions based on TiO2, SiO2, HfO2, Al2O3, or a combination of those. Because the nanodamascene technology involves processing temperatures lower than 300°C, this technology is fully compatible with CMOS back-end-of-line and is used for monolithic 3D integration.

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Publisher

Hindawi Publishing Corporation,Hindawi,John Wiley & Sons, Inc

Subject

3-D technology

/ CMOS

/ Engineering Sciences