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Equivalent-accuracy accelerated neural-network training using analogue memory
by
Shelby, Robert M.
, Narayanan, Pritish
, Burr, Geoffrey W.
, Cheng, Christina
, Farinha, Nathan C. P.
, Giordano, Massimo
, Jaoudi, Yassine
, Tsai, Hsinyu
, di Nolfo, Carmelo
, Boybat, Irem
, Bodini, Martina
, Sidler, Severin
, Killeen, Benjamin
, Ambrogio, Stefano
in
639/166/987
/ 639/705/258
/ 639/766/119/995
/ Accelerators
/ Algorithms
/ Arrays
/ Artificial intelligence
/ Artificial neural networks
/ Back propagation
/ Capacitors
/ Chips (memory devices)
/ Classification
/ CMOS
/ Computer applications
/ Computer memory
/ Computer programs
/ Computing time
/ Data processing
/ Data processing services
/ Data transfer (computers)
/ Datasets
/ Energy conservation
/ Energy efficiency
/ Energy management
/ Equivalence
/ Field programmable gate arrays
/ Hardware
/ Humanities and Social Sciences
/ Integrated circuits
/ International conferences
/ Learning algorithms
/ Machine learning
/ Memory
/ Microprocessors
/ multidisciplinary
/ Neural networks
/ Parallel processing
/ Polarity
/ Science
/ Science (multidisciplinary)
/ Semiconductors
/ Software
/ Software upgrading
/ Synapses
/ Technology application
/ Transistors
2018
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Equivalent-accuracy accelerated neural-network training using analogue memory
by
Shelby, Robert M.
, Narayanan, Pritish
, Burr, Geoffrey W.
, Cheng, Christina
, Farinha, Nathan C. P.
, Giordano, Massimo
, Jaoudi, Yassine
, Tsai, Hsinyu
, di Nolfo, Carmelo
, Boybat, Irem
, Bodini, Martina
, Sidler, Severin
, Killeen, Benjamin
, Ambrogio, Stefano
in
639/166/987
/ 639/705/258
/ 639/766/119/995
/ Accelerators
/ Algorithms
/ Arrays
/ Artificial intelligence
/ Artificial neural networks
/ Back propagation
/ Capacitors
/ Chips (memory devices)
/ Classification
/ CMOS
/ Computer applications
/ Computer memory
/ Computer programs
/ Computing time
/ Data processing
/ Data processing services
/ Data transfer (computers)
/ Datasets
/ Energy conservation
/ Energy efficiency
/ Energy management
/ Equivalence
/ Field programmable gate arrays
/ Hardware
/ Humanities and Social Sciences
/ Integrated circuits
/ International conferences
/ Learning algorithms
/ Machine learning
/ Memory
/ Microprocessors
/ multidisciplinary
/ Neural networks
/ Parallel processing
/ Polarity
/ Science
/ Science (multidisciplinary)
/ Semiconductors
/ Software
/ Software upgrading
/ Synapses
/ Technology application
/ Transistors
2018
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Equivalent-accuracy accelerated neural-network training using analogue memory
by
Shelby, Robert M.
, Narayanan, Pritish
, Burr, Geoffrey W.
, Cheng, Christina
, Farinha, Nathan C. P.
, Giordano, Massimo
, Jaoudi, Yassine
, Tsai, Hsinyu
, di Nolfo, Carmelo
, Boybat, Irem
, Bodini, Martina
, Sidler, Severin
, Killeen, Benjamin
, Ambrogio, Stefano
in
639/166/987
/ 639/705/258
/ 639/766/119/995
/ Accelerators
/ Algorithms
/ Arrays
/ Artificial intelligence
/ Artificial neural networks
/ Back propagation
/ Capacitors
/ Chips (memory devices)
/ Classification
/ CMOS
/ Computer applications
/ Computer memory
/ Computer programs
/ Computing time
/ Data processing
/ Data processing services
/ Data transfer (computers)
/ Datasets
/ Energy conservation
/ Energy efficiency
/ Energy management
/ Equivalence
/ Field programmable gate arrays
/ Hardware
/ Humanities and Social Sciences
/ Integrated circuits
/ International conferences
/ Learning algorithms
/ Machine learning
/ Memory
/ Microprocessors
/ multidisciplinary
/ Neural networks
/ Parallel processing
/ Polarity
/ Science
/ Science (multidisciplinary)
/ Semiconductors
/ Software
/ Software upgrading
/ Synapses
/ Technology application
/ Transistors
2018
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Equivalent-accuracy accelerated neural-network training using analogue memory
Journal Article
Equivalent-accuracy accelerated neural-network training using analogue memory
2018
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Overview
Neural-network training can be slow and energy intensive, owing to the need to transfer the weight data for the network between conventional digital memory chips and processor chips. Analogue non-volatile memory can accelerate the neural-network training algorithm known as backpropagation by performing parallelized multiply–accumulate operations in the analogue domain at the location of the weight data. However, the classification accuracies of such in situ training using non-volatile-memory hardware have generally been less than those of software-based training, owing to insufficient dynamic range and excessive weight-update asymmetry. Here we demonstrate mixed hardware–software neural-network implementations that involve up to 204,900 synapses and that combine long-term storage in phase-change memory, near-linear updates of volatile capacitors and weight-data transfer with ‘polarity inversion’ to cancel out inherent device-to-device variations. We achieve generalization accuracies (on previously unseen data) equivalent to those of software-based training on various commonly used machine-learning test datasets (MNIST, MNIST-backrand, CIFAR-10 and CIFAR-100). The computational energy efficiency of 28,065 billion operations per second per watt and throughput per area of 3.6 trillion operations per second per square millimetre that we calculate for our implementation exceed those of today’s graphical processing units by two orders of magnitude. This work provides a path towards hardware accelerators that are both fast and energy efficient, particularly on fully connected neural-network layers.
Analogue-memory-based neural-network training using non-volatile-memory hardware augmented by circuit simulations achieves the same accuracy as software-based training but with much improved energy efficiency and speed.
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